SN74GTLP1394_07 Datasheet, PDF (14/25 Pages) Texas Instruments – 2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY

SN74GTLP1394
2-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER
WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY
SCES286F – OCTOBER 1999 – REVISED APRIL 2005
APPLICATION INFORMATION
PHYSICAL REPRESENTATION
64-Bit Data Bus
32- to 64-Bit Address Bus
GTLP1394 Transceiver
1394 Backplane PHY
1394 Link-Layer Controller
Host Microprocessor
www.ti.com
Terminators
Backplane Trace
Connectors
VME/FB+/CPCI or
GTLP Transceivers
STRB
Module
Node
PHY
A2 Y2 A1 Y1
V_TT
Module
Node
PHY
R_TT
B2
B1
STRB
DATA
DATA
Module
Node
PHY
V_TT
R_TT
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