SN74AVCA406E Datasheet, PDF (14/22 Pages) Texas Instruments – MMC AND SD CARD VOLTAGE-TRANSLATION TRANSCEIVER

SN74AVCA406E
MMC AND SD CARD VOLTAGE-TRANSLATION TRANSCEIVER
SCES659B – OCTOBER 2007 – REVISED DECEMBER 2007
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
C_L
(see Note A)
R_L
R_L
2 × V_CCO
S1
Open
GND
TEST
t_pd
t_PLZ/t_PZL
t_PHZ/t_PZH
LOAD CIRCUIT
V_CCO
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
C_L
15 pF
15 pF
15 pF
15 pF
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S1
Open
2 × V_CCO
GND
R_L
2 kΩ
2 kΩ
2 kΩ
2 kΩ
V_TP
0.1 V
0.15 V
0.15 V
0.3 V
Output
Control
(low-level
enabling)
V_CCA/2
V_CCA/2
V_CCA
0V
Input
t_PLH
Output
t_PZL
t_PLZ
V_CCI/2
V_CCI/2
V_CCI
0V
t_PHL
V_CCO/2
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
V_OH
V_CCO/2
V_OL
Output
Waveform 1
S1 at 2 × V_CCO
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
t_PZH
V_CCO/2
V_CCO/2
V_OL + V_TP
t_PHZ
V_OH – V_TP
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
V_CCO
V_OL
V_OH
0V
NOTES: A. C_L includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRRv10 MHz, Z_O = 50 Ω, dv/dt ≥ 1 V/ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. t_PLZ and t_PHZ are the same as t_dis.
F. t_PZL and t_PZH are the same as t_en.
G. t_PLH and t_PHL are the same as t_pd.
H. V_CCI is the V_CC associated with the input port.
I. V_CCO is the V_CC associated with the output port.
Figure 5. Load Circuit and Voltage Waveforms
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