PTB48560A_15 Datasheet, PDF (14/29 Pages) Texas Instruments – 30-W, 48-V INPUT DC/DC CONVERTERS WITH AUTO-TRACK™ SEQUENCING

PTB48560A, PTB48560B
PTB48560C
SLTS236A – MARCH 2005 – REVISED OCTOBER 2005
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Input Current Limiting
The converter is not internally fused. For safety and overall system protection, the maximum input current to
the converter must be limited. Active or passive current limiting can be used. Passive current limiting can be a
fast-acting fuse. A 125-V fuse, rated no more than 5 A, is recommended. Active current limiting can be
implemented with a current limited Hot-Swap controller.
Thermal Considerations
Airflow may be necessary to ensure that the module can supply the desired load current in environments with
elevated ambient temperatures. The required airflow rate is determined from the safe operating area (SOA). The
SOA is the area beneath the applicable airflow rate curve on the graph of temperature derating vs output current.
(See the Typical Characteristics.) Operating the converter within the SOA limits ensures that all the internal
components are at or below their stated maximum operating temperatures.
Using the On/Off Enable Controls on the PTB48560x Auto-Track Compatible DC/DC Converters
The converter incorporates two output enable controls. PEN (pin 2) is the positive enable input, and NEN (pin 3)
is the negative enable input. Both inputs are electrically referenced to -V_I (pin 4) on the primary or input side of
the converter. The enable pins are ideally controlled with an open-collector (or open-drain) discrete transistor.
Each input has an internal pullup resistor to a reference. There is no benefit to adding pullup resistors external to
the module. If they are added, the maximum input voltage for these inputs must be limited to a maximum of 60 V.
Automatic (UVLO) Power Up
Connecting NEN (pin 3) to -V_I (pin 4) and leaving PEN (pin 2) open-circuit, configures the converter for automatic
power up. The converter control circuitry incorporates an undervoltage lockout (UVLO) function, which disables
the converter until the minimum specified input voltage is present at ±V_I (see the Electrical Characteristics table).
The UVLO circuitry ensures a clean transition during power up and power down, allowing the converter to
tolerate a slow rising input voltage. For most applications, the PEN and NEN enable controls can be configured
for automatic power up.
Positive Output Enable (Negative Inhibit)
To configure the converter for a positive enable function, connect NEN (pin 3) to -V_I (pin 4), and apply the system
On/Off control signal to PEN (pin 2). In this configuration, applying less than 0.8 V (with respect to -V_I potential)
to pin 2 disables the converter output. Figure 15 gives an example circuit that uses a MOSFET transistor.
+V_I
1 = Outputs Off
Q1
BSS138
1
+V_I
DC/DC
Module
2
PEN
3
NEN
−V_I
4 _−VI
Figure 15. Positive Enable Configuration
Negative Output Enable (Positive Inhibit)
To configure the converter for a negative enable function, PEN (pin 2) is left open circuit, and the system On/Off
control signal is applied to NEN (pin 3). A low-level control signal (less than 0.8 V) must then be applied to pin 3
to enable an output from the converter. An example of this configuration is detailed in Figure 16.
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