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OPA170_15 Datasheet, PDF (14/34 Pages) Texas Instruments – 36V, Single-Supply, SOT553, Low-Power OPERATIONAL AMPLIFIERS Value Line Series
OPA170
OPA2170
OPA4170
SBOS557B – AUGUST 2011 – REVISED SEPTEMBER 2012
www.ti.com
CAPACITIVE LOAD AND STABILITY
The dynamic characteristics of the OPAx170 have
been optimized for common operating conditions. The
combination of low closed-loop gain and high
capacitive loads decreases the phase margin of the
amplifier and can lead to gain peaking or oscillations.
As a result, heavier capacitive loads must be isolated
from the output. The simplest way to achieve this
isolation is to add a small resistor (for example, ROUT
equal to 50Ω) in series with the output. Figure 38 and
Figure 39 illustrate graphs of small-signal overshoot
versus capacitive load for several values of ROUT.
Also, refer to Applications Bulletin AB-028, Feedback
Plots Define Op Amp AC Performance (literature
number SBOA015, available for download from the TI
website), for details of analysis techniques and
application circuits.
or even the output pin. Each of these different pin
functions have electrical stress limits determined by
the voltage breakdown characteristics of the
particular semiconductor fabrication process and
specific circuits connected to the pin. Additionally,
internal electrostatic discharge (ESD) protection is
built into these circuits to protect them from
accidental ESD events both before and during
product assembly.
These ESD protection diodes also provide in-circuit,
input overdrive protection, as long as the current is
limited to 10mA as stated in the Absolute Maximum
Ratings. Figure 40 shows how a series input resistor
may be added to the driven input to limit the input
current. The added resistor contributes thermal noise
at the amplifier input and its value should be kept to a
minimum in noise-sensitive applications.
W
V+
W
W
W
+18V
OPA170
-18V
G = +1
ROUT
RL
CL
Figure 38. Small-Signal Overshoot versus
Capacitive Load (100mV Output Step, G = +1)
W
W
W
W
RI = 10kW
RF = 10kW
+18V
OPA170
-18V
G = -1
ROUT
CL
IOVERLOAD
10mA max
VIN
5kW
OPA170
VOUT
Figure 40. Input Current Protection
An ESD event produces a short duration, high-
voltage pulse that is transformed into a short
duration, high-current pulse as it discharges through
a semiconductor device. The ESD protection circuits
are designed to provide a current path around the
operational amplifier core to prevent it from being
damaged. The energy absorbed by the protection
circuitry is then dissipated as heat.
When the operational amplifier connects into a circuit,
the ESD protection components are intended to
remain inactive and not become involved in the
application circuit operation. However, circumstances
may arise where an applied voltage exceeds the
operating voltage range of a given pin. Should this
condition occur, there is a risk that some of the
internal ESD protection circuits may be biased on,
and conduct current. Any such current flow occurs
through ESD cells and rarely involves the absorption
device.
Figure 39. Small-Signal Overshoot versus
Capacitive Load (100mV Output Step, G = –1)
ELECTRICAL OVERSTRESS
Designers often ask questions about the capability of
an operational amplifier to withstand electrical
overstress. These questions tend to focus on the
device inputs, but may involve the supply voltage pins
If there is an uncertainty about the ability of the
supply to absorb this current, external zener diodes
may be added to the supply pins. The zener voltage
must be selected such that the diode does not turn
on during normal operation. However, its zener
voltage should be low enough so that the zener diode
conducts if the supply pin begins to rise above the
safe operating supply voltage level.
14
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