BQ27000 Datasheet, PDF (14/29 Pages) Texas Instruments – SINGLE CELL Li-Ion AND Li-Pol BATTERY GAS GAUGE IC FOR PORTABLE APPLICATIONS (bqJUNIOR)

bq27000, bq27200
SLUS556B – SEPTEMBER 2004 – REVISED NOVEMBER 2004
www.ti.com
WRTNAC, DONE, PRST, FRST, and SHIP (bq27000 only) commands are prioritized in bit order. This means
that WRTNAC (bit 5) has higher priority than DONE (bit 4); PRST (bit 3) has higher priority than FRST (bit 1),
and so on. Only the highest priority mode set is enabled each time the CTRL register is written with data 0xA9,
and the firmware clears all other mode bits and the CTRL register when that action is complete. The host system
must make two writes for every mode to be enabled: one write to the MODE register to set the appropriate bit
and a second write to the CTRL register to signal that the command in the mode register should be executed.
The CIO value may be subtracted from the CEO value to determine the external board offset. This value can be
programmed into the PKCFG[4-2] in the EEPROM for automatic compensation of this external offset value.
At-Rate Registers (ARH/ARL) — Address 0x02/0x03
The host can write the current in units of 3.57 µV per bit to this register for predictive calculation time-to-empty.
The part uses this value to predict the time-to-empty at any desired current; it does not affect the time-to-empty
calculation based on the actual current. The current written into this register pair is always assumed to be a
discharge current.
This register is also used during pack manufacturing to input a nominal available charge value to set NAC to the
approximate initial pack capacity value.
At Rate Time-to-Empty Registers (ARTTEL/ARTTEH) — Address 0x04/0x05
This is predicted time-to-empty in minutes at user-entered discharge rate. The discharge current used in the
calculation is entered by the host system in the AR registers. The at-rate capacitance (ARCAP) value used can
be larger or smaller than CACT. It is computed using the same formulas as CACT, except the discharge
compensation is computed using AR, instead of AI, for the discharge rate. The equation used to predict at-rate
time-to-empty is:
ARTTE = 60 * ARCAP / AR
The host system has read-only access to this register pair.
Reported Temperature Registers (TEMPL/TEMPH) — Address 0x06/0x07
The TEMPH and the TEMPL registers contain the reported die temperature. The temperature is expressed in
units of 0.25 °K and is updated every 2.56 seconds. The equation to calculate reported pack temperature is:
Temperature = 0.25 * (256 * TEMPH + TEMPL)
The host system has read-only access to this register pair.
Reported Battery Voltage registers (VOLTL/VOLTH) — Address 0x08/0x09
The VOLTH and the VOLTL low-byte registers contain the reported battery voltage measured on the BAT pin.
Voltage is expressed in mV with an LSB resolution of 1 mV. Reported voltage cannot exceed 5000 mV. The host
system has read-only access to this register pair. Voltage is updated every 2.56 seconds.
Status Flag Register (FLAGS) — Address 0x0A
NAME
POR STATUS
BIT 7
CHGS
0
BIT 6
NOACT
0
BIT 5
IMIN
0
BIT 4
CI
1
BIT 3
CALIP
0
BIT 2
VDQ
0
BIT 1
EDV1
0
BIT 0
EDVF
0
CHGS
Charge State flag. A 1 in the CHGS indicates a charge current (V_SRP > V_SRN). A 0 indicates a lack
of charge activity. This bit should be read when the host system reads the Average Current register
pair to determine the sign of the average current magnitude. This bit is cleared to 0 on all resets.
NOACT
No Activity flag. A 1 indicates that the voltage across R_S is less than the digital magnitude filter. See
the Digital Magnitude Filter section for more information. This bit is cleared to 0 on all resets.
IMIN
Li-ion taper current detection flag. A 1 indicates that the charge current has tapered to less than the
value set in EEPROM and that the battery voltage is greater than or equal to the value selected by
the QV0 and QV1 bits in the PKCFG register (see EEPROM Data Register description for more
details). Taper current detection is disqualified if AI < 8 (28.6 µV across sense resistor). The taper
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