5962-85155052A Datasheet, PDF (14/27 Pages) Texas Instruments – LOW-POWER HIGH-PERFORMANCE IMPACT

TIBPAL16R4-25C, TIBPAL16R6-25C, TIBPAL16R8-25C
TIBPAL16R4-30M, TIBPAL16R6-30M, TIBPAL16R8-30M
LOW-POWER HIGH-PERFORMANCE IMPACT ™ PAL^® CIRCUITS
SRPS059A FEBRUARY 1984 − REVISED DECEMBER 2010
power-up reset (see Figure 2)
Following power up, all registers are set high. This feature provides extra flexibility to the system designer and
is especially valuable in simplifying state-machine initialization. To ensure a valid power-up reset, it is important
that the rise of V_CC be monotonic. Following power-up reset, a low-to-high clock transition must not occur until
all applicable input and feedback setup times are met.
V_CC
4V
5V
t_pd^†
(600 ns TYP, 1000 ns MAX)
Active-Low
Registered Output
1.5 V
t_su^‡
V_OH
V_OL
CLK
1.5 V
t_w
V_IH
1.5 V
V_IL
† _{This is the power-up reset time and applies to registered outputs only. The values shown are from characterization data.}
‡ _{This is the setup time for input or feedback.}
Figure 2. Power-Up Reset Waveforms
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