TSB81BA3D Datasheet, PDF (13/59 Pages) Texas Instruments – IEEE 139b THREE-PORT CABLE TRANSCEIVER/ARBITER

TSB81BA3D, TSB81BA3DI
IEEE 1394b THREEĆPORT CABLE TRANSCEIVER/ARBITER
SLLS559E − DECEMBER 2002 − REVISED JUNE 2006
electrical characteristics over recommended ranges of operating conditions (unless otherwise noted)
(continued)
thermal characteristics
PARAMETER
TEST CONDITION
R_θJA Junction-to-free-air thermal resistance ^{Board mounted, No air flow, High conductivity TI}
recommended test board, chip soldered or greased to
R_θJC Junction-to-case-thermal resistance _{thermal land with 2 oz. copper}
R_θJA
R_θJC
Junction-to-free-air thermal resistance
Junction-to-case-thermal resistance
Board mounted, No air flow, High conductivity TI
recommended test board with thermal land but no solder
or grease thermal connection to thermal land with 2 oz.
copper
R_θJA Junction-to-free-air thermal resistance _{Board mounted, No air flow, High conductivity JEDEC}
R_θJC Junction-to-case-thermal resistance ^{test board with 1 oz. copper}
MIN TYP
19.04
0.17
MAX
UNIT
°C/W
°C/W
31.52
°C/W
0.17
49.17
3.11
°C/W
°C/W
°C/W
switching characteristics
PARAMETER
TEST CONDITION
tr
TP differential rise time, transmit
10% to 90%, At 1394 connector
tf
TP differential fall time, transmit
90% to 10%, At 1394 connector
tsu Setup time, CTL0, CTL1, D1−D7, LREQ to 1394a−2000 50% to 50%, See Figure 2
PCLK
th
Hold time, CTL0, CTL1, D1−D7, LREQ
1394a−2000 50% to 50%, See Figure 2
after PCLK
tsu Setup time, CTL0, CTL1, D1−D7, LREQ to 1394b
LCLK
50% to 50%, See Figure 2
th
Hold time, CTL0, CTL1, D1−D7, LREQ
1394b
after LCLK
50% to 50%, See Figure 2
td
Delay time, PCLK to CTL0, CTL1, D1−D7, 1394a−2000 50% to 50%, See Figure 3
PINT
and 1394b
MIN TYP MAX UNIT
0.5
1.2 ns
0.5
1.2 ns
2.5
ns
0
ns
2.5
ns
0
ns
0.5
7
ns
PARAMETER MEASUREMENT INFORMATION
TPAx+
TPBx+
56 Ω
TPAx−
TPBx−
Figure 1. Test Load Diagram
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