TRF3761_07 Datasheet, PDF (13/56 Pages) Texas Instruments – INTEGER-N PLL WITH INTEGRATED VCO

TRF3761
www.ti.com
SLWS181F – OCTOBER 2005 – REVISED JANUARY 2007
TRF3761-G ELECTRICAL CHARACTERISTICS
Supply voltage = V_CC = 5V, T_A = –40 to 85 °C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
NOISE CHARACTERISTICS
100kHz offset
VCO phase noise,
Free running VCO direct output
f_VCO = 1989MHz,
f_O = 1989MHz
600kHz offset
1MHz offset
6MHz offset
10MHz offset
100kHz offset
VCO phase noise,
Free running VCO divide-by-2 output
f_VCO = 1989MHz,
f_O = 994.5MHz
600kHz offset
1MHz offset
6MHz offset
10MHz offset
100kHz offset
VCO phase noise,
Free running VCO divide-by-4 output
f_VCO = 1989MHz,
f_O = 497.25MHz
600kHz offset
1MHz offset
6MHz offset
10MHz offset
1kHz offset
VCO phase noise,
Closed loop phase noise direct output^(1)(2)(3)
f_VCO = 1989MHz,
f_O = 1989MHz
600kHz offset
1MHz offset
10MHz offset
RMS phase error
Closed loop phase noise direct output⁽³⁾
100Hz to 10MHz
1kHz offset
VCO phase noise,
f_VCO = 1989MHz,
Closed loop phase noise divide-by-2 output^(1)(2)(3) f_O = 994.5MHz
600kHz offset
1MHz offset
10MHz offset
RMS phase error
Closed loop phase noise divide-by-2 output⁽³⁾
100Hz to 10MHz
1kHz offset
VCO phase noise,
f_VCO = 1989MHz,
Closed loop phase noise divide-by-4 output^(1)(2)(3) f_O = 497.25MHz
600kHz offset
1MHz offset
10MHz offset
RMS phase error
Closed loop phase noise divide-by-4 output⁽³⁾
100Hz to 10MHz
VCO gain, Kv
VCO free running
Reference spur⁽²⁾
MIN TYP MAX UNIT
-115
-136
-141.2
-155.6
-159
-121.3
-142.4
-141.5
-157.2
-158
-128
-148
-151
-156.8
-157
-83
-136
-141
-159
1°
-88.7
-141.9
-147.5
-158
0.509°
-95
-147.9
-151.3
-156
0.252°
23
–80
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
MHz/V
dBc
(1) See Application Circuit Figure 78.
(2) PFD = 200kHz, Loop Filter BW = 15kHz, Output frequency step = 200kHz.
(3) Reference oscillator RMS phase error = 0.008250°, RMS jitter = 881.764 fs.
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