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TPS7A7200-EP_15 Datasheet, PDF (13/28 Pages) Texas Instruments – 2-A, FAST-TRANSIENT, LOW-DROPOUT VOLTAGE REGULATOR
TPS7A7200-EP
www.ti.com
APPLICATION INFORMATION
SBVS224A – JUNE 2013 – REVISED JUNE 2013
OVERVIEW
The TPS7A7200 belongs to a family of new-generation LDO regulators that uses innovative circuitry to offer
very-low dropout voltage along with the flexibility of a programmable output voltage.
The dropout voltage for this LDO regulator family is 0.18 V at 2 A. This voltage is ideal for making the
TPS7A7200 into a point-of-load (POL) regulator because 0.18 V at 2 A is lower than any voltage gap among the
most common voltage rails: 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.0 V, and 3.3 V. This device offers a fully user-
configurable output voltage setting method. The TPS7A7200 output voltage can be programmed to any target
value from 0.9 V to 3.5 V in 50-mV steps.
Another big advantage of using the TPS7A7200 is the wide range of available operating input voltages: from 1.5
V to 6.5 V. The TPS7A7200 also has very good line and load transient response. All these features allow the
TPS7A7200 to meet most voltage-regulator needs for under-6-V applications, using only one device so that less
time is spent on inventory control.
Texas Instruments also offers different output current ratings with other family devices: the TPS7A7100 (1 A) and
TPS7A7300 (3 A).
USER-CONFIGURABLE OUTPUT VOLTAGE
Unlike traditional LDO devices, the TPS7A7200 comes with only one orderable part number; there is no
adjustable or fixed output voltage option. The output voltage of the TPS7A7200 is selectable in accordance with
the names given to the output voltage setting pins: 50mV, 100mV, 200mV, 400mV, 800mV, and 1.6V. For each
pin connected to the ground, the output voltage setting increases by the value associated with that pin name,
starting from the value of the reference voltage of 0.5 V; floating the pin(s) has no effect on the output voltage.
Figure 34 through Figure 39 show examples of how to program the output voltages.
OUT
SNS
CFF
FB
PG
50mV
Thermal Pad
IN
EN
SS
NC
1.6V
Optional
OUT
SNS
CFF
FB
PG
50mV
Thermal Pad
IN
EN
SS
NC
1.6V
Optional
32R
50mV
VIN
FB
16R
8R
0.5 V
4R
2R
OUT
SNS
3.2R
CFF
FB
1R
100mV
200mV
400mV
800mV
1.6V
VOUT = 0.9 V = 0.5 V + 400 mV
0.5 V is Vref
VOUT = 0.5 V ´ (1 + 3.2R/4R)
Figure 34. 0.9-V Configuration
32R
50mV
VIN
FB
16R
8R
0.5 V
4R
2R
OUT
SNS
3.2R
CFF
FB
1R
100mV
200mV
400mV
800mV
1.6V
VOUT = 1.2 V = 0.5 V + 100 mV + 200 mV + 400 mV
0.5 V is Vref
VOUT = 0.5 V ´ (1 + 3.2R/2.29R) 2.29R is parallel resistance of 16R, 8R, and 4R.
Figure 35. 1.2-V Configuration
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: TPS7A7200-EP
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