TPS5210 Datasheet, PDF (13/29 Pages) Texas Instruments – PROGRAMMABLE SYNCHRONOUS-BUCK REGULATOR CONTROLLER

TPS5210
PROGRAMMABLE SYNCHRONOUS BUCK REGULATOR CONTROLLER
SLVS171A – SEPTEMBER 1998 – REVISED MAY 1999
switching characteristics over recommended operating virtual-junction temperature range,
V_CC = 12 V, I_DRV = 0 A (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VSENSE to HIGHDR or
LOWDR (excluding dead-
time)
1.3 V ≤ VVREF ≤ 3.5 V, 10 mV overdrive
(see Note 3)
Propagation delay
OCP comparator
OVP comparator
See Note 3
PWRGD comparator
SLOWST comparator
Overdrive = 10 mV (see Note 3)
Rise time
Fall time
HIGHDR output
LOWDR output
HIGHDR output
LOWDR output
CL = 9 nF,
VBOOTLO = 0 V,
CL = 9 nF,
TJ = 125°C
CL = 9 nF,
VBOOTLO = 0 V,
CL = 9 nF,
TJ = 125°C
VBOOT = 6.5 V,
TJ = 125°C
VDRV = 6.5 V,
VBOOT = 6.5 V,
TJ = 125°C
VDRV = 6.5 V,
Deglitch time (Includes
comparator propagation
delay)
OCP
OVP
See Note 3
VHISENSE = 12 V,
VIOUTLO pulsed from 12 V to 11.9 V,
100 ns rise/fall times (see Note 3)
Response time
High-side VDS sensing
VHISENSE = 4.5 V,
VIOUTLO pulsed from 4.5 V to 4.4 V,
100 ns rise/fall times (see Note 3)
VHISENSE = 3 V,
VIOUTLO pulsed from 3 V to 2.9 V,
100 ns rise/fall times (see Note 3)
Short-circuit protection
rising-edge delay
SCP
LOSENSE = 0 V (see Note 3)
Turn-on/turn-off delay
Crossover delay time
VDS sensing sample/hold
switch
LOWDR to HIGHDRV, and
LOHIB to LOWDR
3 V ≤ VHISENSE ≤ 11 V,
VLOSENSE = VHISENSE (see Note 3)
See Note 3
Prefilter pole frequency
Hysteretic comparator
See Note 3
Propagation delay
LODRV
See Note 3
NOTE 3: This parameter is ensured by design and is not production tested.
MIN TYP MAX UNIT
150 250 ns
1
1
µs
1
560 900 ns
60
ns
60
60
ns
60
2
5
µs
2
5
2
3 µs
3
300
500 ns
30
100 ns
30
100 ns
5
MHz
400 ns
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