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TLC072-Q1_15 Datasheet, PDF (13/24 Pages) Texas Instruments – WIDE-BANDWIDTH HIGH-OUTPUT-DRIVE SINGLE-SUPPLY OPERATIONAL AMPLIFIER
TLC072-Q1
www.ti.com ...................................................................................................................................................................................................... SLOS583 – JUNE 2008
APPLICATION INFORMATION
Driving a Capacitive Load
When the amplifier is configured in this manner, capacitive loading directly on the output decreases the device's
phase margin, leading to high-frequency ringing or oscillations. Therefore, for capacitive loads of greater than 10
pF, it is recommended that a resistor be placed in series (RNULL) with the output of the amplifier, as shown in
Figure 38. A minimum value of 20 Ω should work well for most applications.
RF
RG
Input
_
+
RNULL
Output
CLOAD
Figure 38. Driving a Capacitive Load
Offset Voltage
The output offset voltage (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times
the corresponding gains. The following schematic and formula (see Figure 39) can be used to calculate the
output offset voltage:
RF
IIB−
RG
+
−
VI
+
VO
RS
IIB+
ǒ ǒ ǓǓ ǒ ǒ ǓǓ VOO + VIO
1)
RF
RG
" IIB) RS
1)
RF
RG
" IIB– RF
Figure 39. Output Offset Voltage Model
High-Speed CMOS Input Amplifiers
The TLC072 is a high-speed low-noise CMOS input operational amplifier that has an input capacitance of the
order of 20 pF. Any resistor used in the feedback path adds a pole in the transfer function equivalent to the input
capacitance multiplied by the combination of source resistance and feedback resistance. For example, a gain of
–10, a source resistance of 1 kΩ, and a feedback resistance of 10 kΩ add an additional pole at approximately 8
MHz. This is more apparent with CMOS amplifiers than bipolar amplifiers due to their greater input capacitance.
This is of little consequence on slower CMOS amplifiers, as this pole normally occurs at frequencies above their
unity-gain bandwidth. However, the TLC07x with its 10-MHz bandwidth means that this pole normally occurs at
frequencies where there is on the order of 5-dB gain left and the phase shift adds considerably.
The effect of this pole is the strongest with large feedback resistances at small closed loop gains. As the
feedback resistance is increased, the gain peaking increases at a lower frequency and the 180° phase shift
crossover point also moves down in frequency, decreasing the phase margin.
Copyright © 2008, Texas Instruments Incorporated
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