SN75LVDS83DGGR Datasheet, PDF (13/21 Pages) Texas Instruments – FlatLink TRANSMITTER

Not Recommended for New Designs
SN75LVDS83
FlatLink TRANSMITTER
Graphic Controller
12-BIT
RED0
RED1
RED2
RED3
RSVD
RSVD
NA
NA
GREEN0
GREEN1
GREEN2
GREEN3
RSVD
RSVD
NA
NA
BLUE0
BLUE1
BLUE2
BLUE3
RSVD
RSVD
NA
NA
H_SYNC
V_SYNC
ENABLE
NA
CLOCK
18-BIT
RED0
RED1
RED2
RED3
RED4
RED5
NA
NA
GREEN0
GREEN1
GREEN2
GREEN3
GREEN4
GREEN5
NA
NA
BLUE0
BLUE1
BLUE2
BLUE3
BLUE4
BLUE5
NA
NA
H_SYNC
V_SYNC
ENABLE
NA
CLOCK
24-BIT
RED0
RED1
RED2
RED3
RED4
RED5
RED6
RED7
GREEN0
GREEN1
GREEN2
GREEN3
GREEN4
GREEN5
GREEN6
GREEN7
BLUE0
BLUE1
BLUE2
BLUE3
BLUE4
BLUE5
BLUE6
BLUE7
H_SYNC
V_SYNC
ENABLE
RSVD
CLOCK
APPLICATION INFORMATION
SLLS271I − MARCH 1997 − REVISED MAY 2009
Host
Cable
Flat Panel Display
SN75LVDS83
51 _D0
52 _D1
54 _D2
55 _D3
56 _D4
3 _D6
50 _D27
2 _D5
4 _D7
6 _D8
7 _D9
11 _D12
12 _D13
14 _D14
8 _D10
10 _D11
15 _D15
19 _D18
20 _D19
22 _D20
23 _D21
24 _D22
16 _D16
18 _D17
27 _D24
28 _D25
30 _D26
25 _D23
31 _CLKIN
See Note A ¹⁷ CLKSEL
48
Y0M
47
Y0P
46
Y1M
45
Y1P
42
Y2M
41
Y2P
38
Y3M
37
Y3P
40
CLKOUTM
39
CLKOUTP
100 Ω
100 Ω
100 Ω
SN75LVDS86
8
A0M
9
A0P
10
A1M
11
A1P
14
A2M
15
A2P
100 Ω
16
CLKINM
17
CLKINP
NOTES: A. Connect this terminal to VCC for triggering to the rising edge of the input clock and to GND for the falling edge.
B. The four 100-Ω terminating resistors are recommended to be 0603 types.
Figure 13. 24-Bit Color Host To 18-Bit LCD Panel Display Application
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