LP2996MRX-NOPB Datasheet, PDF (13/26 Pages) Texas Instruments – Source and Sink Current, Low Output Voltage Offset

LP2996-N
www.ti.com
SNOSA40J – NOVEMBER 2002 – REVISED MARCH 2013
DDR-II APPLICATIONS
With the separate VDDQ pin and an internal resistor divider it is possible to use the LP2996-N in applications
utilizing DDR-II memory. Figure 25 and Figure 26 show several implementations of recommended circuits with
output curves displayed in the Typical Performance Characteristics. Figure 25 shows the recommended circuit
configuration for DDR-II applications. The output stage is connected to the 1.8V rail and the AVIN pin can be
connected to either a 3.3V or 5V rail. For new designs, the LP2997 or LP2998 is recommended for DDR-II
applications.
SD
VDDQ = 1.8V
AVIN = 2.2V to 5.5V
PVIN = 1.8V
+
CIN
LP2996
SD
VDDQ
AVIN
VREF
VSENSE
PVIN
VTT
GND
+
CREF
VREF = 0.9V
+
COUT
VTT = 0.9V
Figure 27. Recommended DDR-II Termination
If it is not desirable to use the 1.8V rail it is possible to connect the output stage to a 3.3V rail. Care should be
taken to not exceed the maximum junction temperature as the thermal dissipation increases with lower V_TT
output voltages. For this reason it is not recommended to power PVIN off a rail higher than the nominal 3.3V.
The advantage of this configuration is that it has the ability to source and sink a higher maximum continuous
current.
SD
VDDQ = 1.8V
AVIN = 3.3V or 5.5V
PVIN = 3.3V
+
CIN
LP2996
SD
VDDQ
VREF
AVIN
VSENSE
PVIN
VTT
GND
+
CREF
VREF= 0.9V
+
COUT
VTT = 0.9V
Figure 28. DDR-II Termination with higher voltage rails
LEVEL SHIFTING
If standards other than SSTL-2 are required, such as SSTL-3, it may be necessary to use a different scaling
factor than 0.5 times V_DDQ for regulating the output voltage. Several options are available to scale the output to
any voltage required. One method is to level shift the output by using feedback resistors from V_TT to the V_SENSE
pin. This has been illustrated in Figure 29 and Figure 30. Figure 29 shows how to use two resistors to level shift
V_TT above the internal reference voltage of VDDQ/2. To calculate the exact voltage at V_TT the following equation
can be used.
V_TT = VDDQ/2 ( 1 + R1/R2)
(11)
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