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TPS62065_15 Datasheet, PDF (12/28 Pages) Texas Instruments – TPS6206x 3-MHz, 2-A, Step-Down Converter in 2-mm × 2-mm SON Package
TPS62065, TPS62067
SLVS833C – MARCH 2010 – REVISED JULY 2015
9 Application and Implementation
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NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The TPS62065 and TPS62067 are highly efficient synchronous step down DC/DC converters providing up to 2-A
output current.
9.2 Typical Application
VIN = 2.9 V to 6 V
PVIN
AVIN
CIN
10 µF
EN
MODE
AGND
PGND
L
1.0 mH
SW
R1
360 kΩ
FB
R2
180 kΩ
VOUT = 1.8 V
up to 2 A
Cff
22 pF
COUT
10 µF
Figure 9. TPS62065 1.8-V Adjustable Output Voltage Configuration
9.2.1 Design Requirements
The device operates over an input voltage range from 2.9 V to 6 V. The output voltage is adjustable using an
external feedback divider.
9.2.2 Detailed Design Procedure
9.2.2.1 Output Voltage Setting
The output voltage can be calculated to:
VOUT
=
VREF
´
æç1 +
è
R1
R2
ö
÷
ø
R1 =
æ
ç
VOUT
è VREF
-
ö
1÷
ø
´
R2
with an internal reference voltage VREF typically 0.6 V.
To minimize the current through the feedback divider network, R2 should be within the range of 120 kΩ to 360
kΩ. The sum of R1 and R2 should not exceed approximately 1 MΩ, to keep the network robust against noise. An
external feed-forward capacitor Cff is required for optimum regulation performance. Lower resistor values can be
used. R1 and Cff places a zero in the loop. The right value for Cff can be calculated as:
1
fz = 2 ´ p ´ R1 ´ Cff = 25 kHz
1
Cff = 2 ´ p ´ R1 ´ 25 kHz
9.2.2.2 Output Filter Design (Inductor and Output Capacitor)
The internal compensation network of TPS6206x is optimized for a LC output filter with a corner frequency of:
fc = 2 ´ p ´
1
(1μH ´10μF)
= 50kHz
(2)
12
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