TPS54550_15 Datasheet, PDF (12/32 Pages) Texas Instruments – 4.5-V TO 20-V INPUT, 6-A OUTPUT SYNCHRONOUS PWM SWITCHER WITH INTEGRATED FET (SWIFT™)

TPS54550
SLVS623A – MARCH 2006 – REVISED APRIL 2006
Overcurrent Protection
Overcurrent protection is implemented by sensing
the drain-to-source voltage across the high-side
MOSFET and compared to a voltage level which
represents the overcurrent threshold limit. If the
drain-to-source voltage exceeds the overcurrent
threshold limit for more than 100 ns, the high-side
MOSFET is disable, the SSENA pin is pulled low,
and the internal digital slow-start is reset to 0 V.
SSENA is held low for approximately the time that is
calculated by Equation 6:
THICCUP(ms)
+
2250
ƒ_s(kHz)
(6)
Once the hiccup time is complete, the SSENA pin is
released and the converter initiates the internal
slow-start.
Setting the Output Voltage
The output voltage of the TPS54550 can be set by
feeding back a portion of the output to the VSENSE
pin using a resistor divider network. In the application
circuit of Figure 29, this divider network is comprised
of resistors R1 and R2. To calculate the resistor
values to generate the required output voltage use
the following equation:
R2
+
R1
V_O
0.891
* 0.891
(7)
Start with a fixed value of R1 and calculate the
required R2 value. Assuming a fixed value of 10 kΩ
for R1, the following table gives the appropriate R2
value for several common output voltages:
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OUTPUT VOLTAGE (V)
1.2
1.5
1.8
2.5
3.3
R2 VALUE (kΩ)
28.7
14.7
9.76
5.49
3.74
Output Voltage Limitations
Due to the internal design of the TPS54550 there are
both upper and lower output voltage limits for any
given input voltage. Additionally, the lower boundary
of the output voltage set point range also depends
on operating frequency. The upper limit of the output
voltage set point is constrained by the maximum duty
cycle of the device and is shown in Figure 12. The
lower limit is constrained by the minimum
controllable on time, which may be as high as 220
ns. The approximate minimum output voltage for a
given input voltage and range of operating
frequencies is shown in Figure 8, while the maximum
operating frequency versus input voltage for some
common output voltages is shown in Figure 10.
The curves shown in these two figures are valid for
output currents greater than 0.5 A. As output
currents decrease towards no load (0 A), the
minimum output voltage decreases. For applications
where the load current is less than 100 mA, the
curves shown in Figure 9 and Figure 11 are
applicable. All of the data plotted in these curves are
approximate and take into account a possible 20%
deviation in actual operating frequency relative to the
intended set point.
12
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