TPS54229E_15 Datasheet, PDF (12/25 Pages) Texas Instruments – 4.5V to 18V Input, 2-A Synchronous Step-Down Converter with Eco-Mode™

TPS54229E
SLVSAZ7A – SEPTEMBER 2011 – REVISED MARCH 2012
DESIGN GUIDE
Step-By-Step Design Procedure
To begin the design process, the user must know a few application parameters:
• Input voltage range
• Output voltage
• Output current
• Output voltage ripple
• Input voltage ripple
U1
TPS54229EDDA
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Figure 15. Shows the schematic diagram for this design example.
Output Voltage Resistors Selection
The output voltage is set with a resistor divider from the output node to the VFB pin. It is recommended to use
1% tolerance or better divider resistors. Start by using Equation 3 to calculate V_OUT.
To improve efficiency at light loads consider using larger value resistors, high resistance is more susceptible to
noise, and the voltage errors from the VFB input current are more noticeable.
VOUT = 0.765 x ^{æçççè}1 + _RR21^{÷÷÷öø}
(3)
Output Filter Selection
The output filter used with the TPS54229E is an LC circuit. This LC filter has double pole at:
1
FP =
2p
L
OUT
xC
OUT
(4)
At low frequencies, the overall loop gain is set by the output set-point resistor divider network and the internal
gain of the TPS54229E. The low frequency phase is 180 degrees. At the output filter pole frequency, the gain
rolls off at a –40 dB per decade rate and the phase drops rapidly. D-CAP2™ introduces a high frequency zero
that reduces the gain roll off to –20 dB per decade and increases the phase to 90 degrees one decade above the
zero frequency. The inductor and capacitor selected for the output filter must be selected so that the double pole
of Equation 4 is located below the high frequency zero but close enough that the phase boost provided be the
high frequency zero provides adequate phase margin for a stable circuit. To meet this requirement use the
values recommended in Table 1
12
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