TMS320VC5409A Datasheet, PDF (12/98 Pages) Texas Instruments – Fixed-PointDigital Signal Processor

TMS320VC5409A
Fixed-PointDigital Signal Processor
SPRS140F – NOVEMBER 2000 – REVISED JANUARY 2005
www.ti.com
2.2.2 Pin Assignments for the PGE Package
The TMS320VC5409APGE 144-pin low-profile quad flatpack (LQFP) pin assignments are shown in
Figure 2-2.
CV_{SS 1}
A22 ₂
CV_{SS 3}
DV_{DD 4}
A10 ₅
HD7 ₆
A11 ₇
A12 ₈
A13 ₉
A14 ₁₀
A15 ₁₁
CV_{DD 12}
HAS ₁₃
DV_{SS 14}
CV_{SS 15}
CV_{DD 16}
HCS ₁₇
HR/W ₁₈
READY ₁₉
PS ₂₀
DS ₂₁
IS ₂₂
R/W ₂₃
MSTRB ₂₄
IOSTRB ₂₅
MSC ₂₆
XF ₂₇
HOLDA ₂₈
IAQ ₂₉
HOLD ₃₀
BIO ₃₁
MP/MC ₃₂
DV_{DD 33}
CV_{SS 34}
BDR1 ₃₅
BFSR1 ₃₆
108 A18
107 A17
106 DVSS
105 A16
104 D5
103 D4
102 D3
101 D2
100 D1
99 D0
98 RS
97 X2/CLKIN
96 X1
95 HD3
94 CLKOUT
93 DVSS
92 HPIENA
91 CV_DD
90 CV_SS
89 TMS
88 TCK
87 TRST
86 TDI
85 TDO
84 EMU1/OFF
83 EMU0
82 TOUT
81 HD2
80 HPI16
79 CLKMD3
78 CLKMD2
77 CLKMD1
76 DV_SS
75 DV_DD
74 BDX1
73 BFSX1
A. DV_DD is the power supply for the I/O pins while CV_DD is the power supply for the core CPU. DV_SS is the ground for
the I/O pins while CV_SS is the ground for the core CPU. The DV_SS and CV_SS pins can be connected to a common
ground plane in a system.
Figure 2-2. 144-Pin PGE Low-Profile Quad Flatpack (Top View)
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