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THS1030 Datasheet, PDF (12/22 Pages) Texas Instruments – 2.7 V . 5.5 V, 10-BIT, 30 MSPS CMOS ANALOG-TO-DIGITAL CONVERTER
THS1030
2.7 V – 5.5 V, 10-BIT, 30 MSPS
CMOS ANALOG-TO-DIGITAL CONVERTER
SLAS243A – NOVEMBER 1999 – REVISED JANUARY 2000
PRINCIPLES OF OPERATION
Table 1. Mode Selection
MODES
ANALOG
INPUT
INPUT
SPAN
MODE
PIN
REFSENSE
PIN
VREF
PIN
REFTS
PIN
REFBS
PIN
AIN
AIN
Top/bottom
AIN
AIN
AIN
AIN
Center span
AIN
AIN
External
reference
AIN
1V
2V
1+Ra/Rb
External
VREF
1V
2V
1+Ra/Rb
VREF
2 V max
AVDD
AVDD
AVDD
AVDD
AVDD/2
AVDD/2
AVDD/2
AVDD/2
AGND
AGND
Mid Ra & Rb
Short together
Short together
Short together to Ra
AGND
AGND
AGND
AVDD
NC
NC
AGND
Short together
AGND
NC
Mid Ra & Rb
AVDD
Ra
External
See Note 1 See Note 1
Short together to the common
mode voltage
Voltage within supply
(REFTS–REBS) = 2 V max
Differential
input
AIN is input 1
REFTS &
REFBS are
shorted
together for
input 2
1V
2V
VREF
AVDD
AVDD
AVDD
Short together
AGND
NC
AVDD
External
Short together AVDD/2
NOTE 1: In external reference mode, VREF can be available for external use with CENTER SPAN set-up.
FIGURE
7, 14
8, 15
9, 14, 15
10, 14, 15
7, 13
8, 13
9, 13
10, 13
11, 12
16
reference operations
VREF-pin reference
The voltage reference sources on the VREF pin are controlled by the REFSENSE pin as shown in Table 2.
REFSENSE
AGND
AVDD
Short to VREF
Connect to Ra/Rb
Table 2. VREF Reference Selection
VREF
2V
The internal reference is disabled and an external reference should be connected to VREF pin.
1V
1+Ra/Rb
D 1-V reference: The internal reference may be set to 1 V by connecting REFSENSE to VREF .
12
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