PAL16L8AM Datasheet, PDF (12/18 Pages) Texas Instruments – STANDARD HIGH-SPEED PAL CIRCUITS

PAL16L8AM, PAL16L8A-2M, PAL16R4AM, PAL16R4A-2M
PAL16R6AM, PAL16R6A-2M, PAL16R8AM, PAL16R8A-2M
STANDARD HIGH-SPEED PAL^® CIRCUITS
SRPS016 – D2705, FEBRUARY 1984 – REVISED MARCH 1992
PARAMETER MEASUREMENT INFORMATION
5V
From Output
Under Test
CL
(see Note A)
S1
R1
R2
Test
Point
Timing
Input
tsu
Data
Input
1.5 V
th
1.5 V
1.5 V
LOAD CIRCUIT FOR
3-STATE OUTPUTS
3V
High-Level
Pulse
0
3V
Low-Level
0
Pulse
1.5 V 1.5 V
tw
1.5 V 1.5 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Input
tpd
In-Phase
Output
tpd
Out-of-Phase
Output
(see Note D)
1.5 V
1.5 V
1.5 V
3V
1.5 V
0
tpd
VOH
1.5 V
VOL
tpd
VOH
1.5 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
PULSE DURATIONS
Output
Control
(low-level
enabling)
ten
1.5 V
tdis
1.5 V
Waveform 1
S1 Closed
(see Note B)
ten
Waveform 2
S1 Open
(see Note B)
1.5 V
tdis
1.5 V
3V
0
3V
0
3V
0
≈ 3.3 V
VOL + 0.5 V
VOL
VOH
VOH – 0.5 V
≈0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A. CL includes probe and jig capacitance and is 50 pF for tpd and ten, 5 pF for tdis.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2
is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses have the following characteristics: PRR ≤ 10 MHz, tr and tf ≤ 2 ns, duty cycle = 50%
D. When measuring propagation delay times of 3- state outputs, switch S1 is closed.
E. Equivalent loads may be used for testing.
Figure 1. Load Circuit and Voltage Waveforms
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SRPS016