ONET8501V Datasheet, PDF(12/28 Page) Texas Instruments – 11.3 Gbps Differential VCSEL Driver With Output Waveform Shaping

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ONET8501V Datasheet, PDF (12/28 Pages) Texas Instruments – 11.3 Gbps Differential VCSEL Driver With Output Waveform Shaping

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ONET8501V

SLLS837B â JUNE 2007 â REVISED SEPTEMBER 2007

www.ti.com

Table 15. Register 13 (0x0D) Mapping â Modulation Range

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

MODRNG1

bit 0

MODRNG0

Table 16. Register Functionality

SYMBOL

ENA

Enable bit 7

PDRNG1

PDRNG0

Photodiode current range bit 6

Photodiode current range bit 5

OLENA

Open loop enable bit 4

FLTEN

Fault detection enable bit 3

PKRNG

Peaking tail current range bit 2

EQENA

Equalizer Enable bit 1

PDPOL

MODC7

MODC6

MODC5

MODC4

MODC3

MODC2

MODC1

MODC0

BIASC7

BIASC6

BIASC5

BIASC4

BIASC3

BIASC2

BIASC1

BIASC0

EQADJ7

EQADJ6

EQADJ5

EQADJ4

EQADJ3

Photodiode polarity bit 0

Modulation current bit 7 (MSB)

Modulation current bit 6

Modulation current bit 5

Modulation current bit 4

Modulation current bit 3

Modulation current bit 2

Modulation current bit 1

Modulation current bit 0 (LSB)

Bias current bit 7 (MSB)

Bias current bit 6

Bias current bit 5

Bias current bit 4

Bias current bit 3

Bias current bit 2

Bias current bit 1

Bias current bit 0 (LSB)

Equalizer adjustment bit 7 (MSB)

Equalizer adjustment bit 6

Equalizer adjustment bit 5

Equalizer adjustment bit 4

Equalizer adjustment bit 3

FUNCTION

Enable chip bit:

1 = chip enabled. Can be toggled low to reset a fault condition

0 = chip disabled

Photodiode current range bits:

With Coupling Ratio CR between VCSEL bias current and photodiode current

= 30

1X = 25Î¼A â 1280Î¼A / 5Î¼A resolution

01 = 12.5Î¼A â 640Î¼A / 2.5Î¼A resolution

00 = 2.5Î¼A â 128Î¼A / 0.5Î¼A resolution

Open loop enable bit:

1 = open loop bias current control,

0 = closed loop bias current control

Fault detection enable bit:

1 = fault detection on

0 = fault detection off

Laser peaking tail current range (over- and undershoot):

1 = 0mA â 12mA

0 = 0mA â 6mA

Equalizer enable bit

1 = equalizer enabled

0 = equalizer disabled

Photodiode polarity bit:

1 = photodiode cathode connected to VCC

0 = photodiode anode connected to GND

Modulation current setting:

MODRNG = 00 (see below); Modulation current: 24 mA / 94 Î¼A steps

MODRNG = 01 (see below): Modulation current: 20 mA / 78 Î¼A steps

MODRNG = 10 (see below); Modulation current: 15.8 mA / 62 Î¼A steps

MODRNG = 11 (see below); Modulation current: 12 mA / 47 Î¼A steps

Closed loop (APC):

Coupling ratio CR = IBIAS-VCSEL / IPD, BIASC = 0 .. 255, IBIAS-VCSEL â¤ 20mA:

PDRNG = 00 (see above); IBIAS-VCSEL = 0.5 Î¼A Ã CR Ã BIASC

PDRNG = 01 (see above); IBIAS-VCSEL = 2.5 Î¼A Ã CR Ã BIASC

PDRNG = 1X (see above); IBIAS-VCSEL = 5 Î¼A Ã CR Ã BIASC

Open loop: IBIAS-VCSEL = 86 Î¼A Ã BIASC

Equalizer adjustment setting

EQENA = 0 (see above)

Equalizer is turned off and bypassed

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