LP3856-ADJ_15 Datasheet, PDF (12/22 Pages) Texas Instruments – 3A Fast Response Ultra Low Dropout Linear Regulators

LP3856-ADJ
SNVS243E – SEPTEMBER 2003 – REVISED APRIL 2013
www.ti.com
If a load is connected to the IC output which switches at high speed (such as a clock), the high-frequency current
pulses required by the load must be supplied by the capacitors on the IC output. Since the bandwidth of the
regulator loop is less than 100 kHz, the control circuitry cannot respond to load changes above that frequency.
The means the effective output impedance of the IC at frequencies above 100 kHz is determined only by the
output capacitor(s).
In applications where the load is switching at high speed, the output of the IC may need RF isolation from the
load. It is recommended that some inductance be placed between the output capacitor and the load, and good
RF bypass capacitors be placed directly across the load.
PCB layout is also critical in high noise environments, since RFI/EMI is easily radiated directly into PC traces.
Noisy circuitry should be isolated from "clean" circuits where possible, and grounded through a separate path. At
MHz frequencies, ground planes begin to look inductive and RFI/EMI can cause ground bounce across the
ground plane.
In multi-layer PCB applications, care should be taken in layout so that noisy power and ground planes do not
radiate directly into adjacent layers which carry analog power and ground.
OUTPUT NOISE
Noise is specified in two ways:
Spot Noise or Output noise density is the RMS sum of all noise sources, measured at the regulator output, at
a specific frequency (measured with a 1Hz bandwidth). This type of noise is usually plotted on a curve as a
function of frequency.
Total output Noise or Broad-band noise is the RMS sum of spot noise over a specified bandwidth, usually
several decades of frequencies.
Attention should be paid to the units of measurement. Spot noise is measured in units µV/√Hz or nV/√Hz and
total output noise is measured in µV(rms).
The primary source of noise in low-dropout regulators is the internal reference. In CMOS regulators, noise has a
low frequency component and a high frequency component, which depend strongly on the silicon area and
quiescent current. Noise can be reduced in two ways: by increasing the transistor area or by increasing the
current drawn by the internal reference. Increasing the area will decrease the chance of fitting the die into a
smaller package. Increasing the current drawn by the internal reference increases the total supply current
(ground pin current). Using an optimized trade-off of ground pin current and die size, LP3856-ADJ achieves low
noise performance and low quiescent current operation.
The total output noise specification for LP3856-ADJ is presented in the Electrical Characteristics table. The
Output noise density at different frequencies is represented by a curve under typical performance characteristics.
SHORT-CIRCUIT PROTECTION
The LP3856-ADJ is short circuit protected and in the event of a peak over-current condition, the short-circuit
control loop will rapidly drive the output PMOS pass element off. Once the power pass element shuts down, the
control loop will rapidly cycle the output on and off until the average power dissipation causes the thermal
shutdown circuit to respond to servo the on/off cycling to a lower frequency. Please refer to the section on
thermal information for power dissipation calculations.
SHUTDOWN OPERATION
A CMOS Logic low level signal at the Shutdown ( SD) pin will turn-off the regulator. Pin SD must be actively
terminated through a 10kΩ pull-up resistor for a proper operation. If this pin is driven from a source that actively
pulls high and low (such as a CMOS rail to rail comparator), the pull-up resistor is not required. This pin must be
tied to Vin if not used.
The Shutdown ( SD) pin threshold has no voltage hysteresis. If the Shutdown pin is actively driven, the voltage
transition must rise and fall cleanly and promptly.
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