ADS8323Y Datasheet, PDF(12/25 Page) Texas Instruments – 16-Bit, 500kSPS, microPower Sampling ANALOG-TO-DIGITAL CONVERTER

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ADS8323Y Datasheet, PDF (12/25 Pages) Texas Instruments – 16-Bit, 500kSPS, microPower Sampling ANALOG-TO-DIGITAL CONVERTER

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ADS8323

SBAS224C â DECEMBER 2001 â REVISED JANUARY 2010

The analog input is provided to two input pins, +IN

and âIN. When a conversion is initiated, the

differential input on these pins is sampled on the

internal capacitor array. A conversion is initiated on

the ADS8323 by bringing CONVST (pin 21) low for a

minimum of 20ns. CONVST low places the

sample-and-hold amplifier in the hold state and the

conversion process is started. The BUSY output (pin

17) goes high when the conversion begins and stays

high during the conversion. While a conversion is in

progress, both inputs are disconnected from any

internal function. When the conversion result is

latched into the output register, the BUSY signal goes

low. The data can be read from the parallel output

bus following the conversion by bringing both RD and

CS low.

NOTE: This mode of operation is described in more

detail in the Timing and Control section of this data

sheet.

SAMPLE-AND-HOLD SECTION

The sample-and-hold on the ADS8323 allows the

ADC to accurately convert an input sine wave of

full-scale amplitude to 16-bit resolution. The input

bandwidth of the sample-and-hold is greater than the

Nyquist rate (Nyquist equals one-half of the sampling

rate) of the ADC even when the ADC is operated at

its maximum throughput rate of 500kSPS. The typical

small-signal bandwidth of the sample-and-hold

amplifier is 20MHz. The typical aperture delay time,

or the time it takes for the ADS8323 to switch from

the sample to the hold mode following the negative

edge of the CONVST signal, is 10ns. The average

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delta of repeated aperture delay values is typically

30ps (also known as aperture jitter). These

specifications reflect the ability of the ADS8323 to

capture ac input signals accurately at the exact same

moment in time.

REFERENCE

If the internal reference is used, REFOUT (pin 32)

should be directly connected to REFIN (pin 31); see

Figure 15. The ADS8323 can operate, however, with

an external reference in the range of 1.5V to 2.55V

for a corresponding full-scale range of 3.0V to 5.1V.

The internal reference of the ADS8323 is

double-buffered. If the internal reference is used to

drive an external load, a buffer is provided between

the reference and the load applied to REFOUT (pin 32)

(the internal reference can typically source or sink

10Î¼A of current; compensation capacitance should be

at least 0.1Î¼F to minimize noise). If an external

reference is used, the second buffer provides

isolation between the external reference and the

CDAC. This buffer is also used to recharge all of the

capacitors of the CDAC during conversion.

ANALOG INPUT

The analog input is bipolar and fully differential. There

are two general methods of driving the analog input

of the ADS8323: single-ended or differential, as

shown in Figure 16 and Figure 17. When the input is

single-ended, the âIN input is held at the

common-mode voltage. The +IN input swings around

the same common voltage and the peak-to-peak

amplitude is the (common-mode + VREF) and the

(common-mode â VREF). The value of VREF

determines the range over which the common-mode

voltage may vary (see Figure 18).

-VREF to +VREF

peak-to-peak

Common

Voltage

ADS8323

Single-Ended Input

Common

Voltage

VREF

peak-to-peak

VREF

peak-to-peak

Differential Input

ADS8323

Figure 16. Methods of Driving the ADS8323: Single-Ended or Differential

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