TMS320F2808 Datasheet, PDF (115/123 Pages) Texas Instruments – Digital Signal Processors

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6.11 Flash Timing
TMS320F2808, TMS320F2806
TMS320F2801, UCD9501
Digital Signal Processors
SPRS230F – OCTOBER 2003 – REVISED SEPTEMBER 2005
Table 6-41. Flash Endurance
N_f Flash endurance for the array (write/erase cycles)
N_OTP OTP endurance for the array (write cycles)
0°C to 85°C (ambient)
0°C to 85°C (ambient)
MIN TYP
100 1000
MAX
1
UNIT
cycles
write
Table 6-42. Flash Parameters at 100-MHz SYSCLKOUT
Program
Time
Erase Time
I_DD3VFLP
I_DDP
I_DDIOP
PARAMETER ⁽¹⁾
16-Bit Word
TEST CONDITIONS
16K Sector
8K Sector
4K Sector
16K Sector
8K Sector
4K Sector
V_DD3VFL current consumption during the
Erase/Program cycle
V_DD current consumption during Erase/Program
cycle
V_DDIO current consumption during Erase/Program
cycle
Erase
Program
MIN TYP
50
500
250
125
10
10
10
75
35
140
20
(1) Typical parameters as seen at room temperature using flash API version 3.00 including function call overhead.
MAX
UNIT
µs
ms
ms
ms
S
S
S
mA
mA
mA
mA
Table 6-43. Flash/OTP Access Timing
PARAMETER ⁽¹⁾
MIN
t_a(fp)
Paged flash access time
36
t_a(fr)
Random flash access time
36
t_a(OTP)
OTP access time
60
(1) For 100 MHz, PAGE WS = 3 and RANDOM WS = 3; for 75 MHz, PAGE WS = 2, and RANDOM WS = 2.
TYP MAX
Equations to compute the page wait state and random wait state in Table 6-44 are as follows:
ƪǒ Ǔ ƫ Page Wait State +
t_a(fp)
t_c(SCO)
*1
(round up to the next highest integer) or 0, whichever is larger
ƪǒ Ǔ ƫ Random Wait State +
t_a(fr)
t_c(SCO)
*1
(round up to the next highest integer) or 1, whichever is larger
UNIT
ns
ns
ns
Electrical Specifications 115