TM4C123BE6PZ Datasheet, PDF (1105/1299 Pages) Texas Instruments – This data sheet provides reference information for the TM4C123BE6PZ microcontroller, describing

Tiva^™ TM4C123BE6PZ Microcontroller _{(identical to LM4F212E5QC)}
Register 1: Analog Comparator Masked Interrupt Status (ACMIS), offset 0x000
This register provides a summary of the interrupt status (masked) of the comparators.
Analog Comparator Masked Interrupt Status (ACMIS)
Base 0x4003.C000
Offset 0x000
Type R/W1C, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
IN2
IN1
IN0
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO R/W1C R/W1C R/W1C
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:3
2
1
0
Name
reserved
IN2
IN1
IN0
Type
Reset Description
RO 0x0000.000 Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
R/W1C
0
Comparator 2 Masked Interrupt Status
Value Description
0 No interrupt has occurred or the interrupt is masked.
1 The IN2 bits in the ACRIS register and the ACINTEN registers
are set, providing an interrupt to the interrupt controller.
This bit is cleared by writing a 1. Clearing this bit also clears the IN2 bit
in the ACRIS register.
R/W1C
0
Comparator 1 Masked Interrupt Status
Value Description
0 No interrupt has occurred or the interrupt is masked.
1 The IN1 bits in the ACRIS register and the ACINTEN registers
are set, providing an interrupt to the interrupt controller.
This bit is cleared by writing a 1. Clearing this bit also clears the IN1 bit
in the ACRIS register.
R/W1C
0
Comparator 0 Masked Interrupt Status
Value Description
0 No interrupt has occurred or the interrupt is masked.
1 The IN0 bits in the ACRIS register and the ACINTEN registers
are set, providing an interrupt to the interrupt controller.
This bit is cleared by writing a 1. Clearing this bit also clears the IN0 bit
in the ACRIS register.
July 17, 2013
Texas Instruments-Production Data
1105