THS7315 Datasheet, PDF (11/26 Pages) Texas Instruments – 3-Channel SDTV Video Amplifier with 5th-Order Filters and 5.2-V/V Gain

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THS7315
Input
APPLICATION INFORMATION (continued)
+V_S +V_S
Comparator
STC LPF
Input
Pin
+
-
+
0.1 m F
800 kW
-
Internal
Circuitry
SLOS532 – JUNE 2007
Internal Level
Shifter
Figure 6. Equivalent AC Sync-Tip Clamp Input Circuit
As a result of the delay, the sync may have an apparent voltage shift. The amount of shift depends on the
amount of droop in the signal as dictated by the input capacitor and the STC current flow. Because the sync is
primarily for timing purposes—with syncs occurring on the edge of the sync signal—this shift is transparent in
most systems.
While this feature may not fully eliminate overshoot issues on the input signal in cases of extreme overshoot
and/or ringing, the STC system should help minimize improper clamping levels. As an additional way to
minimize this problem, an external capacitor (for example, 10 pF to 47 pF) to ground in parallel with the external
termination resistors can help filter overshoot problems.
It should be noted that the STC system is dynamic and does not rely upon timing in any way. It only depends on
the voltage appearing at the input pin at any given point in time. The STC filtering helps minimize level shift
problems associated with switching noises or very short spikes on the signal line, ensuring a very robust STC
system.
When using the ac sync-tip clamp operation, there must also be some finite amount of discharge bias current.
As previously discussed, if the input signal goes below the 0 V clamp level, the THS7315 internal loop will
source current to increase the voltage appearing at the input pin. As the difference between the signal level and
the 0 V reference level increases, the amount of source current increases proportionally—supplying up to 2 mA
of current. As a result, the time to re-establish the proper STC voltage can be very short. If this difference is very
small, then the source current will also be very small to account for minor voltage droop.
What happens if the input signal goes above the 0 V input level? The problem is that the video signal will always
be above this level and must not be altered in any way. If the sync level of the input signal is above 0 V,
however, then the internal discharge (sink) current will reduce the ac-coupled bias signal to the proper 0 V level.
This discharge current must not be large enough to significantly alter the video signal, or picture quality issues
may arise. This effect is often seen by looking at the tilt (or droop) of a constant luma signal being applied and
observing the resulting output level. The associated change in luma level from the beginning of the video line to
the end of the video line is the amount of droop.
If the discharge current is very small, the amount of tilt (or droop) is very low, which is a generally a good thing.
Unfortunately, the amount of time for the system to capture the sync signal could be too long. This effect is also
termed hum rejection. Hum arises from the ac line voltage frequency of 50 Hz or 60 Hz. The values of the
discharge current and the ac-coupling capacitor combine to dictate the hum rejection and the amount of line tilt.
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