SN74AUP1G126 Datasheet, PDF (11/17 Pages) Texas Instruments – LOW-POWER SINGLE BUS BUFFER GATE WITH 3-STATS OUTPUT

From Output
Under Test
CL
(see Note A)
SN74AUP1G126
LOWĆPOWER SINGLE BUS BUFFER GATE
WITH 3ĆSTATE OUTPUT
SCES596D – JULY 2004 – REVISED JUNE 2005
PARAMETER MEASUREMENT INFORMATION
(Enable and Disable Times)
5 kΩ
5 kΩ
2 × VCC
S1
GND
TEST
tPLZ/tPZL
tPHZ/tPZH
S1
2 × VCC
GND
LOAD CIRCUIT
VCC = 0.8 V
VCC = 1.2 V
± 0.1 V
VCC = 1.5 V
± 0.1 V
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
CL 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF
V_M
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VI
VCC
VCC
VCC
VCC
VCC
VCC
V_∆
0.1 V
0.1 V
0.1 V
0.15 V
0.15 V
0.3 V
Output
Control
VCC/2
VCC/2
tPZL
Output
Waveform 1
S1 at 2 × VCC
(see Note B)
VCC/2
tPLZ
VOL + V_∆
Output
Waveform 2
S1 at GND
(see Note B)
tPZH
VCC/2
tPHZ
VOH − V_∆
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
VCC
0V
VCC
VOL
VOH
≈0 V
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr/tf = 3 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. All parameters and waveforms are not applicable to all devices.
Figure 4. Load Circuit and Voltage Waveforms
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