BQ24314A Datasheet, PDF (11/21 Pages) Texas Instruments – OVERVOLTAGE AND OVERCURRENT PROTECTION IC AND Li+ CHARGER FRONT-END PROTECTION IC

bq24314A
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SLUS811 – MARCH 2008
OPERATION
The device continuously monitors the input voltage, the input current, and the battery voltage as described in
detail in the following sections.
Input Overvoltage Protection
If the input voltage rises above V_OVP, the internal FET Q1 is turned off, removing power from the circuit. As
shown in Figure 4 to Figure 5, the response is very rapid, with the FET turning off in less than a microsecond.
The FAULT pin is driven low. When the input voltage returns below V_OVP – V_hys(OVP) (but is still above UVLO), the
FET Q1 is turned on again after a deglitch time of t_ON(OVP) to ensure that the input supply has stabilized. Figure 6
shows the recovery from input OVP.
Input Overcurrent Protection
The overcurrent threshold is programmed by a resistor R_ILIM connected from the ILIM pin to VSS. Figure 15
shows the OCP threshold as a function of R_ILIM, and may be approximated by the following equation:
I_OCP = 25 ÷ R_ILIM (current in A, resistance in kΩ), where R_ILIM must be between 15 kΩ and 90 kΩ.
If the load current tries to exceed the I_OCP threshold, the device limits the current for a blanking duration of
t_BLANK(OCP). If the load current returns to less than I_OCP before t_BLANK(OCP) times out, the device continues to
operate. However, if the overcurrent situation persists for t_BLANK(OCP), the FET Q1 is turned off for a duration of
t_REC(OCP), and the FAULT pin is driven low. The FET is then turned on again after t_REC(OCP) and the current is
monitored all over again. Each time an OCP fault occurs, an internal counter is incremented. If 15 OCP faults
occur in one charge cycle, the FET is turned off permanently. The counter is cleared either by removing and
re-applying input power, or by disabling and re-enabling the device with the CE pin. Figure 7 to Figure 9 show
what happens in an overcurrent fault.
To prevent the input voltage from spiking up due to the inductance of the input cable, Q1 is turned off slowly,
resulting in a “soft-stop”, as shown in Figure 9.
Battery Overvoltage Protection
The battery overvoltage threshold BV_OVP is internally set to 4.35V. If the battery voltage exceeds the BV_OVP
threshold, the FET Q1 is turned off, and the FAULT pin is driven low. The FET is turned back on once the battery
voltage drops to BV_OVP – V_hys(Bovp) (see Figure 10 and Figure 11). Each time a battery overvoltage fault occurs,
an internal counter is incremented. If 15 such faults occur in one charge cycle, the FET is turned off permanently.
The counter is cleared either by removing and re-applying input power, or by disabling and re-enabling the
device with the CE pin. In the case of a battery overvoltage fault, Q1 is switched OFF gradually (see Figure 10).
Thermal Protection
If the junction temperature of the device exceeds T_J(OFF), the FET Q1 is turned off, and the FAULT pin is driven
low. The FET is turned back on when the junction temperature falls below T_J(OFF) – T_J(OFF-HYS).
Enable Function
The IC has an enable pin which can be used to enable or disable the device. When the CE pin is driven high, the
internal FET is turned off. When the CE pin is low, the FET is turned on if other conditions are safe. The OCP
counter and the Bat-OVP counter are both reset when the device is disabled and re-enabled. The CE pin has an
internal pulldown resistor and can be left floating. Note that the FAULT pin functionality is also disabled when the
CE pin is high.
Fault Indication
The FAULT pin is an active-low open-drain output. It is in a high-impedance state when operating conditions are
safe, or when the device is disabled by setting CE high. With CE low, the FAULT pin goes low whenever any of
these events occurs:
• Input overvoltage
• Input overcurrent
• Battery overvoltage
• IC Overtemperature
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