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| TMS320LF2407A Datasheet, PDF (104/134 Pages) Texas Instruments – DSP CONTROLLERS | |||
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TMS320LF2407A, TMS320LF2406A, TMS320LF2403A, TMS320LF2402A
TMS320LC2406A, TMS320LC2404A, TMS320LC2403A, TMS320LC2402A
DSP CONTROLLERS
SPRS145K â JULY 2000 â REVISED AUGUST 2005
external memory interface ready-on-read timing (continued)
timing requirements for an external memory interface ready-on-read with one software wait state
and one external wait state (see Figure 48)
th(RDY)COH
tsu(RDY)COH
td(COL-A)RD
Hold time, READY after CLKOUT high
Setup time, READY before CLKOUT high
Delay time, CLKOUT low to address valid
MIN
H â 2.5
H â 9.5
MAX
8
UNIT
ns
ns
ns
CLKOUT
PS, DS, IS
A[0:15]
W/R
SW = 1 cycle
EXW = 1 cycle
Read Cycle
td(COL-A)RD
R/W
D[0:15]
STRB
READY
tsu(RDY)COH
th(RDY)COH
RD
Figure 48. Ready-on-Read Timings With One Software Wait (SW) State and
One External Wait (EXW) State
104
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