English
Language : 

PCI1211 Datasheet, PDF (102/130 Pages) Texas Instruments – PC CARD CONTROLLERS
PCI1211 GGU/PGE
PC CARD CONTROLLERS
SCPS033A – OCTOBER 1998
ExCA global-control register (index 1Eh)
Bit
7
6
5
4
3
2
1
0
Name
ExCA global control
Type
R
R
R
R/W
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
Register: ExCA global control
Type:
Read-only, Read/Write (see individual bit descriptions)
Offset:
CardBus socket address + 81Eh; ExCA offset 1Eh
Default: 00h
Description: This register controls the PC Card socket. The host interrupt mode bits in this register are
retained for Intel 82365SL-DF compatibility. See Table 53 for a complete description of the
register contents.
Table 53. ExCA Global-Control Register (Index 1Eh)
BIT
SIGNAL TYPE
FUNCTION
7–5
RSVD
R
Reserved. Bits 7–5 return 0s when read. Writes have no effect.
4
No function R/W This bit has no assigned function.
Level/edge interrupt mode select. Bit 3 selects the signaling mode for the PCI1211 host interrupt PC. This
3
INTMODE
R/W
bit is encoded as:
0 = Host interrupt is edge mode (default).
1 = Host interrupt is level mode.
Interrupt flag clear mode select. Bit 2 selects the interrupt flag clear mechanism for the flags in the ExCA
2
IFCMODE
R/W
card status change register. This bit is encoded as:
0 = Interrupt flags are cleared by read of CSC register (default).
1 = Interrupt flags are cleared by explicit write back of 1.
Card status change level/edge mode select. Bit 1 selects the signaling mode for the PCI1211 host interrupt
1
CSCMODE
R/W
for card status changes. This bit is encoded as:
0 = Host interrupt is edge mode (default).
1 = Host interrupt is level mode.
Power-down mode select. When bit 0 is set to 1, the PCI1211 is in power-down mode. In power-down
mode, the PCI1211 card outputs are 3-stated until an active cycle is executed on the card interface.
Following an active cycle, the outputs are again 3-stated. The PCI1211 still receives DMA requests,
0
PWRDWN R/W functional interrupts, and/or card status change interrupts; however, an actual card access is required to
wake up the interface. This bit is encoded as:
0 = Power-down mode is disabled (default).
1 = Power-down mode is enabled.
102
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265