TMS370CX2X Datasheet, PDF (10/60 Pages) Texas Instruments – 8-BIT MICROCONTROLLER

TMS370Cx2x
8-BIT MICROCONTROLLER
SPNS018C – FEBRUARY 1993 – REVISED FEBRUARY 1997
peripheral file (PF) (continued)
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{ADDRESS RANGE}
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{1000h–100Fh}
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{1010h–101Fh}
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{1020h–102Fh}
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{1030h–103Fh}
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{1040h–104Fh}
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{1050h–105Fh}
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{1060h–10FFh}
Table 4. TMS370Cx2x Peripheral File Address Map
PERIPHERAL FILE
DESIGNATOR
P000 – P00F
P010 – P01F
P020 – P02F
P030 – P03F
P040 – P04F
P050 – P05F
P060 – P0FF
DESCRIPTION
Reserved
System and EPROM / EEPROM control registers
Digital I / O port control registers
SPI peripheral control registers
Timer 1 registers
SCI1 peripheral control registers
Reserved
data EEPROM
The TMS370Cx2x devices contain 256 bytes of data EEPROM and are memory mapped beginning at location
1F00h and continuing through location 1FFFh. Writing to the data EEPROM module is controlled by the data
EEPROM control register (DEECTL) and the write-protection register (WPR). Programming algorithm
examples are available in the TMS370 Family User’s Guide (literature number SPNU127) or the
TMS370 Family Data Manual (literature number SPNS014B). The data EEPROM features include the following:
D Programming:
– Bit-, byte-, and block-write / erase modes
– Internal charge pump circuitry. No external EEPROM programming voltage supply is needed.
– Control register: Data EEPROM programming is controlled by the DEECTL located in the PF frame
beginning at location P01A. See Table 5.
– In-circuit programming capability. There is no need to remove the device to program it.
D Write protection. Writes to the data EEPROM are disabled during the following conditions.
– Reset. All programming of the data EEPROM module is halted.
– Write protection active. There is one write-protect bit per 32-byte EEPROM block.
– Low-power mode operation
D Write protection can be overridden by applying 12 V to MC.
Table 5. Data EEPROM and Program EPROM Control Registers Memory Map
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ADDRESS
P01A
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _P01B
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _P01C
SYMBOL
DEECTL
—
EPCTL
NAME
Data EEPROM Control Register
Reserved
Program EPROM Control Register
10
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