SN54ABT8245_06 Datasheet, PDF (10/28 Pages) Texas Instruments – SCAN TEST DEVICES WITH OCTAL BUS TRANSCEIVERS

SN54ABT8245, SN74ABT8245
SCAN TEST DEVICES
WITH OCTAL BUS TRANSCEIVERS
SCBS124D – AUGUST 1992 – REVISED DECEMBER 1996
boundary-control register
The boundary-control register (BCR) is 11 bits long. The BCR is used in the context of the RUNT instruction to
implement additional test operations not included in the basic SCOPE™ instruction set. Such operations include
PRPG, PSA with input masking, and binary count up (COUNT). Table 4 shows the test operations decoded by
the BCR.
During Capture-DR, the contents of the BCR are not changed. At power up or in Test-Logic-Reset, the BCR is
reset to the binary value 00000000010, which selects the PSA test operation with no input masking.
The BCR order of scan is from TDI through bits 10 – 0 to TDO. Table 2 shows the BCR bits and their associated
test control signals.
Table 2. Boundary-Control Register Configuration
BCR BIT
NUMBER
10
9
8
7
TEST
CONTROL
SIGNAL
MASK8
MASK7
MASK6
MASK5
BCR BIT
NUMBER
6
5
4
3
TEST
CONTROL
SIGNAL
MASK4
MASK3
MASK2
MASK1
BCR BIT
NUMBER
2
1
0
––
TEST
CONTROL
SIGNAL
OPCODE2
OPCODE1
OPCODE0
––
bypass register
The bypass register is a 1-bit scan path that can be selected to shorten the length of the system scan path,
thereby reducing the number of bits per test pattern that must be applied to complete a test operation.
During Capture-DR, the bypass register captures a logic 0. The bypass register order of scan is shown in
Figure 3.
TDI
Bit 0
TDO
Figure 3. Bypass Register Order of Scan
10
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265