REG101 Datasheet, PDF (10/15 Pages) Texas Instruments – DMOS 100mA Low-Dropout Regulator

BASIC OPERATION
The REG101 series of LDO (Low Drop-Out) linear regula-
tors offers a wide selection of fixed output voltage versions
and an adjustable output version. The REG101 belongs to a
family of new generation LDO regulators that utilize a
DMOS pass transistor to achieve ultra-low dropout perfor-
mance and freedom from output capacitor constraints. Ground
pin current remains under 650µA over all line, load, and
temperature conditions. All versions have thermal and over-
current protection, including foldback current limit.
The REG101 does not require an output capacitor for regu-
lator stability and is stable over most output currents and
with almost any value and type of output capacitor up to
10µF or more. For applications where the regulator output
current drops below several milliamps, stability can be
enhanced by: adding a 1kΩ to 2kΩ load resistor; using
capacitance values less than 10µF; or keeping the effective
series resistance greater than 0.05Ω including the capacitor’s
ESR and parasitic resistance in printed circuit board traces,
solder joints, and sockets.
Although an input capacitor is not required, it is good analog
design practice to connect a 0.1µF low ESR capacitor across
Enable
V_IN
In REG101 Out
V_OUT
0.1µF
Gnd
NR
C_OUT
C_NR
0.01µF
Optional
FIGURE 1. Fixed Voltage Nominal Circuit for REG101.
the input supply voltage. This is recommended to improve
ripple rejection by reducing input voltage ripple.
Figure 1 shows the basic circuit connections for the fixed
voltage models. Figure 2 gives the connections for the
adjustable output version (REG101A) and example resistor
values for some commonly used output voltages. Values for
other voltages can be calculated from the equation shown in
Figure 2.
INTERNAL CURRENT LIMIT
The REG101 internal current limit has a typical value of
170mA. A foldback feature limits the short-circuit current to
a typical short-circuit value of 60mA. This helps to protect
the regulator from damage under all load conditions. A
characteristic of V_OUT versus I_OUT is given in Figure 3 and
in the Typical Characteristics section.
FOLDBACK CURRENT LIMIT
3.5
3.0
REG101-3.3
2.5
2.0
I_CL
1.5
1.0
I_CL
0.5
0
0 20 40 60 80 100 120 140 160 180
Output Current (mA)
FIGURE 3. Foldback Current Limit of the REG101-3.3 at
25°C.
V_IN
0.1µF
Enable
3
1
REG101
5
I_ADJ
4
2 Gnd
Pin numbers for SOT23 package.
V_OUT
R₁
C_FB
0.01µF
C_OUT
Load
Adj
R₂
EXAMPLE RESISTOR VALUES
V_OUT (V)
2.5
3.0
3.3
R₁ (W)⁽¹⁾
11.3k
1.13k
15.8k
1.58k
18.7k
1.87k
R₂ (Ω)⁽¹⁾
11.5k
1.15k
11.5k
1.15k
11.5k
1.15k
Optional
5.0
34.0k
11.5k
3.40k
1.15k
NOTE: (1) Resistors are standard 1% values.
V_OUT = (1 + R₁/R₂) • 1.267V
To reduce current through divider, increase resistor
values (see table at right).
As the impedance of the resistor divider increases,
I_ADJ (~200nA) may introduce an error.
C_FB improves noise and transient response.
FIGURE 2. Adjustable Voltage Circuit for REG101A.
10
REG101
SBVS026C