ADS8405IPFBT Datasheet, PDF (10/29 Pages) Texas Instruments – 16-BIT, 1.25-MSPS, UNIPOLAR PSEUDO DIFFERENTIAL INPUT, MICROPOWER SAMPLING ANALOG-TO-DIGITAL CONVERTER WITH PARALLEL INTERFACE

ADS8405
SLAS427 – DECEMBER 2004
TIMING DIAGRAMS (continued)
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t_w1
CONVST
(used in normal
conversion)
t_w2
t_cycle
CONVST
(used in ABORT)
t_su(AB)
t_pd1
BUSY
t_w4
t_pd2
t_su1
CS
CONVERT^†
t_d6
t_CONV
t_w3
t_w7
t_d7
t_su(AB)
t_CONV
SAMPLING^†
(When CS Toggle)
t_ACQ
BYTE
t_h1
RD = 0
t_en
Data to
be read^†
t_dis
Previous Conversion
DB[15:8]
t_h4
t_su5
Previous
Hi−Z _{D [15:8]}
Invalid
Hi−Z
t_en
Current Conversion
D [15:8]
t_su4
t_h2
t_dis
D [7:0]
Repeated
Hi−Z _{D [15:8]}
Invalid
Previous
DB[7:0] ^Hi−Z D [7:0]
Hi−Z
D [7:0]
Repeated
Hi−Z _{D [7:0]}
†_{Signal internal to device}
t_en
Figure 2. Timing for Conversion and Acquisition Cycles With CS Toggling, RD Tied to BDGND
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