TXS0102 Datasheet, PDF (1/13 Pages) Texas Instruments – 2-BIT BIDIRECTIONAL VOLTAGE-LEVEL TRANSLATOR FOR OPEN-DRAIN APPLICATIONS

www.ti.com
TXS0102
2-BIT BIDIRECTIONAL VOLTAGE-LEVEL TRANSLATOR
FOR OPEN-DRAIN APPLICATIONS
SCES640 – JANUARY 2007
FEATURES
• Available in the Texas Instruments
NanoStar™ and NanoFree™ Packages
• 1.65 V to 3.6 V on A port and 2.3 V to 5.5 V on
B port (V_CCA ≤ V_CCB)
• V_CC Isolation Feature – If Either V_CC Input Is at
GND, Both Ports Are in the High-Impedance
State
• I_off Supports Partial-Power-Down Mode
Operation
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– A Port
– 2500-V Human-Body Model (A114-B)
– 250-V Machine Model (A115-A)
– 1500-V Charged-Device Model (C101)
abc
– B Port
abc
– 8-kV Human-Body Model (A114-B)
abc
– 250-V Machine Model (A115-A)
– 1500-V Charged-Device Model (C101)
abc
DCT OR DCU PACKAGE
(TOP VIEW)
B2 1
GND 2
V_CCA
3
A2 4
8 B1
7
V_CCB
6 OE
5 A1
YZP PACKAGE
(BOTTOM VIEW)
A2 D1 4 5 D2
V_CCA
GND
C1 3 6 C2
B1 2 7 B2
B2 A1 1 8 A2
A1
OE
V_CCB
B1
DESCRIPTION/ORDERING INFORMATION
This two-bit noninverting translator uses two separate configurable power-supply rails. The A port is designed to
track V_CCA. V_CCA accepts any supply voltage from 1.65 V to 3.6 V. The B port is designed to track V_CCB. V_CCA
must be less than or equal to V_CCB. V_CCB accepts any supply voltage from 2.3 V to 5.5 V. This allows for
low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.
When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a
pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the
driver.
ORDERING INFORMATION
T_A
PACKAGE ⁽¹⁾
ORDERABLE PART NUMBER
NanoStar™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP
Reel of 3000 TXS0102YZPR
–40°C to 85°C _{SSOP – DCT}
Reel of 3000
Tube of 250
TXS0102DCTR
TXS0102DCTT
VSSOP – DCU
Reel of 3000 TXS0102DCUR
TOP-SIDE MARKING⁽²⁾
NFEZ_ _ _
NFEZ _ _ _
_ _ NFE
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007, Texas Instruments Incorporated