TXS0101 Datasheet, PDF (1/18 Pages) Texas Instruments – 1-BIT BIDIRECTIONAL VOLTAGE-LEVEL TRANSLATOR FOR OPEN-DRAIN APPLICATIONS

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TXS0101
1-BIT BIDIRECTIONAL VOLTAGE-LEVEL TRANSLATOR
FOR OPEN-DRAIN APPLICATIONS
SCES638 – OCTOBER 2007
FEATURES
1
•2 Available in the Texas Instruments NanoFree™
Package
• 1.65 V to 3.6 V on A port and 2.3 V to 5.5 V on
B port (V_CCA ≤ V_CCB)
• V_CC Isolation Feature – If Either V_CC Input Is at
GND, Both Ports Are in the High-Impedance
State
• I_off Supports Partial-Power-Down Mode
Operation
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– A Port
abc
– 2500-V Human-Body Model (A114-B)
abc
– 200-V Machine Model (A115-A)
abc
– 1500-V Charged-Device Model (C101)
– B Port
abc
– 8-kV Human-Body Model (A114-B)
abc
– 200-V Machine Model (A115-A)
– 1500-V Charged-Device Model (C101)
DBV, DCK, OR DRL PACKAGE
(TOP VIEW)
V_CCA 1
GND 2
A3
6 V_CCB
5 OE
4B
YZP PACKAGE
(BOTTOM VIEW)
A 34 B
GND ^{2 5} OE
V_CCA ^{1 6} V_CCB
DESCRIPTION/ORDERING INFORMATION
This one-bit noninverting translator uses two separate configurable power-supply rails. The A port is designed to
track V_CCA. V_CCA accepts any supply voltage from 1.65 V to 3.6 V. The B port is designed to track V_CCB. V_CCA
must be less than or equal to V_CCB. V_CCB accepts any supply voltage from 2.3 V to 5.5 V. This allows for
low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.
When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a
pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
ORDERING INFORMATION
T_A
PACKAGE ^{(1) (2)}
ORDERABLE PART NUMBER
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP
(Pb-free)
Reel of 3000 TXS0101YZPR
SOT (SOT-23) – DBV
–40°C to 85°C
SOT (SC-70) – DCK
Reel of 3000
Reel of 250
Reel of 3000
Reel of 250
TXS0101DBVR
TXS0101DBVT
TXS0101DCKR
TXS0101DCKT
SOT (SOT-563) – DRL
Reel of 3000
Reel of 250
TXS0101DRLR
TXS0101DRLT
TOP-SIDE MARKING⁽³⁾
_ _ _2G_
2G_
NFF_
2G_
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(3) DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site.
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoFree is a trademark of Texas Instruments.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007, Texas Instruments Incorporated