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TS5A6542_09 Datasheet, PDF (1/22 Pages) Texas Instruments – 0.75-Ω SPDT ANALOG SWITCH WITH INPUT LOGIC TRANSLATION
TS5A6542
www.ti.com
SCDS211C – AUGUST 2006 – REVISED DECEMBER 2009
0.75-Ω SPDT ANALOG SWITCH WITH INPUT LOGIC TRANSLATION
Check for Samples: TS5A6542
FEATURES
1
• Specified Break-Before-Make Switching
• Low ON-State Resistance (0.75 Ω Max)
• Control Inputs Referenced to VIO
• Low Charge Injection
• Excellent ON-State Resistance Matching
• Low Total Harmonic Distortion (THD)
• 2.25-V to 5.5-V Power Supply (V+)
• 1.65-V to 1.95-V Logic Supply (VIO)
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Performance Tested Per JESD 22
– 4000-V Human-Body Model
(A114-B, Class II)
– 1000-V Charged-Device Model (C101)
– 400-V Machine Model (A115-A)
• COM Port to GND
– 8000-V Human-Body Model
(A114-B, Class II)
– ±15-kV Contact Discharge (IEC 61000-4-2)
APPLICATIONS
• Cell Phones
• PDAs
• Portable Instrumentation
YZP PACKAGE
(BOTTOM VIEW)
VIO
NC
GND
NO
D1 4 5 D2
C1 3 6 C2
B1 2 7 B2
A1 1 8 A2
V+
IN
COM
GND
DESCRIPTION/ORDERING INFORMATION
The TS5A6542 is a single-pole double-throw (SPDT) analog switch that is designed to operate from 2.25 V to
5.5 V. The device offers a low ON-state resistance with an excellent channel-to-channel ON-state resistance
matching, and the break-before-make feature to prevent signal distorion during the transferring of a signal from
one path to another. The device has excellent total harmonic distortion (THD) performance and consumes very
low power. These features make this device suitable for portable audio applications.
The TS5A6542 has a separate logic supply pin (VIO) that is characterized to operate from 1.65 V to 1.95 V. VIO
powers the control circuitry, which allows the TS5A6542 to be controlled by 1.8-V signals.
Table 1. ORDERING INFORMATION(1)
TA
–40°C to 85°C
PACKAGE (2)
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP
(Pb-free)
ORDERABLE PART NUMBER
Tape and reel TS5A6542YZPR
TOP-SIDE MARKING(3)
_ _ _ JH7
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the wafer fab/assembly site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006–2009, Texas Instruments Incorporated