TS5A26542_15 Datasheet, PDF (1/22 Pages) Texas Instruments – 0.75-Ω DUAL SPDT ANALOG SWITCH WITH INPUT LOGIC TRANSLATION

TS5A26542
www.ti.com
SCDS232E – JUNE 2006 – REVISED DECEMBER 2009
0.75-Ω DUAL SPDT ANALOG SWITCH WITH INPUT LOGIC TRANSLATION
Check for Samples: TS5A26542
FEATURES
1
•2 Specified Break-Before-Make Switching
• Low ON-State Resistance (0.75 Ω Max)
• Control Inputs Reference to V_IO
• Low Charge Injection
• Excellent ON-State Resistance Matching
• Low Total Harmonic Distortion (THD)
• 2.25-V to 5.5-V Power Supply (V₊)
• 1.65-V to 1.95-V Logic Supply (V_IO)
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Performance Tested Per JESD 22
– 2000-V Human-Body Model
(A114-B, Class II)
– 1000-V Charged-Device Model (C101)
– 300-V Machine Model (A115-A)
• COM Inputs
– 8000-V Human-Body Model
(A114-B, Class II)
– ±15-kV Contact Discharge (IEC 61000-4-2)
APPLICATIONS
• Cell Phones
• PDAs
• Portable Instrumentation
YZT PACKAGE⁽¹⁾
(BOTTOM VIEW)
A BCD
1³
4
9 10
2²
5
8 11
3¹
6
7 12
(1)_{The GND balls are internally connected.}
A
B
C
D
1 IN1 NO1 COM1 NC1
2 VIO GND GND V+
3 IN2 NO2 COM2 NC2
DESCRIPTION
The TS5A26542 is a dual single-pole double-throw (SPDT) analog switch that is designed to operate from 2.25 V
to 5.5 V. The device offers a low ON-state resistance with an excellent channel-to-channel ON-state resistance
matching, and the break-before-make feature to prevent signal distortion during the transferring of a signal from
one path to the another. The device has excellent total harmonic distortion (THD) performance and consumes
very low power. These features make this device suitable for portable audio applications.
The TS5A26542 has a separate logic supply pin (V_IO) that operates from 1.65 V to 1.95 V. V_IO powers the control
circuitry, which allows the TS5A26542 to be controlled by 1.8-V signals.
Table 1. ORDERING INFORMATION
T_A
–40°C to 85°C
PACKAGE ⁽¹⁾
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZT
(Pb-free) 0.625-mm max height
ORDERABLE PART NUMBER
Reel of 3000 TS5A26542YZTR
TOP-SIDE MARKING⁽²⁾
_ _ _ JN_
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the
TI website at www.ti.com.
(2) YZT: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoFree is a trademark of Texas Instruments.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006–2009, Texas Instruments Incorporated