TS3DDR3812 Datasheet, PDF (1/18 Pages) Texas Instruments – 12-Channel, 1:2 MUX/DEMUX Switch for DDR3 Applications

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TS3DDR3812
SCDS314A – FEBRUARY 2011 – REVISED MARCH 2011
12-Channel, 1:2 MUX/DEMUX Switch for DDR3 Applications
Check for Samples: TS3DDR3812
FEATURES
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• Compatible with DDR3 SDRAM Standard
(JESD79-3D)
• Wide Bandwidth of 1.675 GHz
• Low Propagation Delay (t_pd = 40 ps Typ)
• Low Bit-to-Bit Skew (t_sk(o) = 6 ps Max)
• Low and Flat ON-State Resistance
(r_ON = 8 Ω Typ)
• Low Input/Output Capacitance
(C_ON = 5.6 pF Typ)
• Low Crosstalk (X_TALK = –43 dB,
Typ at 250 MHz)
• V_CC Operating Range from 3 V to 3.6 V
• Rail-to-Rail Switching on Data I/O Ports
(0 to V_CC)
• Separate Switch Control Logic for Upper and
Lower 6-Channels
• Dedicated Enable Logic Supports Hi-Z Mode
• I_OFF Protection Prevents Current Leakage in
Powered Down State (V_CC = 0 V)
• ESD Performance Tested Per JESD22
– 2000 V Human Body Model
(A114B, Class II)
– 1000 V Charged Device Model (C101)
• 42-pin RUA Package (9 × 3.5 mm, 0.5 mm
Pitch)
APPLICATIONS
• DDR3 Signal Switching
• DIMM Modules
• Notebook/Desktop PCs
• Servers
RUA PACKAGE
(TOP VIEW)
VCC 1
A0 2
A1 3
A2 4
A3 ⁵
A4 ⁶
A5 ⁷
EN ⁸
SEL1 9
SEL2 10
A6 ¹¹
A7 12
A8 13
A9 14
A10 ¹⁵
A11 16
VCC 17
42 41 40 39
GND
18 19 20 21
38 _B2
37 C2
36 _B3
35 C3
34 B4
33 C4
32 B5
31 C5
30 VCC
29 B6
28 C6
27 B7
26 C7
25 B8
24 _C8
23 B9
22 _C9
DESCRIPTION
The TS3DDR3812 is a 12-channel, 1:2 multiplexer/demultiplexer switch designed for DDR3 applications. It
operates from a 3 to 3.6 V supply and offers low and flat ON-state resistance as well as low I/O capacitance
which allow it to achieve a typical bandwidth of 1.675 GHz.
Channels A₀ through A₁₁ are divided into two banks of six bits and are independently controlled via two digital
inputs called SEL1 and SEL2. These select inputs control the switch position of each 6-bit DDR3 source and
allow them to be routed to one of two end-points. Alternatively, the switch can be used to connect a single
endpoint to one of two 6-bit DDR3 sources. For switching 12-bit DDR3 sources, simply connect SEL1 and SEL2
together externally and control all 12 channels with a single GPIO input. An EN input allows the entire chip to be
placed into a high-impedance (Hi-Z) state while not in use.
These characteristics make the TS3DDR3812 an excellent choice for use in memory, analog/digital video, LAN,
and other high-speed signal switching applications.
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011, Texas Instruments Incorporated