TRF3762 Datasheet, PDF (1/33 Pages) Texas Instruments – INTEGER-N PLL WITH INTEGRATED VCO

TRF3762
www.ti.com ....................................................................................................................................................... SLWS205A – JANUARY 2008 – REVISED MAY 2008
INTEGER-N PLL WITH INTEGRATED VCO
FEATURES
1
• Fully Integrated VCO
• Low Phase Noise: –137dBc/Hz
at 600kHz, f_VCO of 1.9GHz
• Low Noise Floor: –158dBc/Hz at 10MHz Offset
• Integer-N PLL
• Input Reference Frequency range:
10MHz to 104MHz
• VCO Frequency Divided by 2-4 Output
• Output Buffer Enable Pin
• Programmable Charge Pump Current
• Hardware and Software Power Down
• 3-Wire Serial Interface
• Single Supply: 4.5V to 5.25V Operation
C1
C4
1000 pF
R2
(See Note A)
C3
R1
C2
PD_OUTBUF
CHIP_EN
CLOCK
DATA
STROBE
DGND
DGND
DVDD1
AVDD_PRES
GND
40 39 38 37 36 35 34 33 32 31
1
30
2
29
3
28
4
27
5
TRF3762
26
6
(TOP VIEW)
25
7
24
8
23
9
22
10
21
11 12 13 14 15 16 17 18 19 20
GND
AVDD_BIAS
R3
2.37 kΩ
RBIAS1
GND
VCTRL_IN
AVDD_VCO
AVDD_BUF
AVDD_CAPARRAY
GND
AVDD
APPLICATIONS
• Wireless Infrastructure
– WCDMA, CDMA, GSM
– Wideband Transceivers
– Wireless Local Loop
– RFID Transceivers
– Clock generation
– IF LO generation
R5
120 Ω
VDD
C5
10 pF
R6
120 Ω
VDD
C6
10 pF
C7
1000 pF
R4
4.75 kΩ
LOAD
A. See the Application Information section for
Loop Filter Design procedures.
PART NUMBER
TRF3762-E
AVAILABLE DEVICE OPTIONS
Fstart
1805
Div by 1
Fstop
1936
Fstart
902.5
Div by 2
Fstop
968
Fstart
451.25
Div by 4
Fstop
484
DESCRIPTION
TRF3762-E is a high performance, highly integrated frequency synthesizer, optimized for high performance
applications. The device includes a low-noise, voltage-controlled oscillator (VCO) and an integer-N PLL.
TRF3762-E integrates divide-by 1, 2, or 4 options for a more flexible output frequency range. The device is
controlled through a 3-wire serial-programming-interface (SPI) interface. For power sensitive applications, the
device can be powered down by the SPI interface or externally via CHIP_EN (pin 2).
The TRF3762-E offers the ability to reduce lock time when compared to the TRF3761-E device. The TRF3762-E
was designed so that the external loop filter is the determining factor in the setting of lock time. Typical lock times
for the TRF3762-E are less than 350µs (depending on the loop filter circuit). All other features of the TRF3762-E
are identical to the TRF3761-E including superior phase noise and spurious output as well as the programming
model and register mapping. The TRF3762-E is pin-to-pin compatible to the TRF3761-E.
1
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008, Texas Instruments Incorporated