TPS65192 Datasheet, PDF (1/25 Pages) Texas Instruments – 9-Channel Level Shifter With Gate Voltage Shaping and Discharge Functions

TPS65192
www.ti.com ....................................................................................................................................................................................................... SLVS962 – JULY 2009
9-Channel Level Shifter With Gate Voltage Shaping and Discharge Functions
FEATURES
1
• 9-Channel Level Shifter Supports 6 × CLK,
VST, ODD, and EVEN Signals
• Organized as Two Groups of 7 + 2 Channels
• Separate Positive Supplies (V_GHX) for Each
Group
• V_GHX Levels up to 38V
• V_GL Levels Down to –13V
• Panel DISCHARGE Function
• Suitable for 4-Phase and 6-Phase Applications
• Gate Voltage Shaping on Channels 1 to 6
• Supports Single and Multiple Flicker Clocks
• Peak Output Currents greater than 500mA
• 28-Pin 5×5 mm QFN Package
APPLICATIONS
• LCD Displays Using Gate-in-Panel (GIP)
Technology
DESCRIPTION
The TPS65192 is a 9 channel level-shifter intended
for use in LCD display applications such as TVs and
monitors. The device converts the logic-level signals
generated by the Timing Controller (T-CON) to the
high-level signals used by the display panel.
The 9 level shifter channels are organized as two
groups. Channels 1 through 7 are powered from V_GH1
and V_GL, and channels 8 and 9 are powered from
V_GH2 and V_GL. Each level-shifter channel features low
impedance output stages that achieve fast rise and
fall times even when driving the capacitive loading
typically present in LCD display applications.
Level shifter channels 1 through 6 support gate
voltage shaping, which can be used to improve
picture quality by reducing image sticking. Novel
decoding logic enables a single flicker clock signal to
control gate voltage shaping for all CLK channels
without the need for synchronization. The device also
supports the use of multiple flicker clocks. The rate of
decay is set by an external resistor or resistor
network connected to the RE pin.
A tenth level shifter channel specially configured with
a comparator input stage allows designers to
implement panel discharging during power-down.
BLOCK DIAGRAM
VGH1
IN1
IN2
IN3
IN4
IN5
IN6
IN7
VSENSE
GND
VGH2
IN8
IN9
-
V_REF
+
FLK1
FLK2
FLK3
RE
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
DISCHARGE
VGL
OUT8
OUT9
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009, Texas Instruments Incorporated