TPIC2603DWG4 Datasheet, PDF (1/19 Pages) Texas Instruments – 6-CHANNEL SERIAL INTERFACE LOW-SIDE DRIVER

TPIC2603
6ĆCHANNEL SERIAL INTERFACE LOWĆSIDE DRIVER
SLIS056A − FEBRUARY 1995 − REVISED MARCH 1996
D Serial Control With Diagnostics
D Six Power DMOS Transistor Outputs of
350-mA Continuous Current
D Internal 60-V Inductive Load Clamp
D Independent ON-State
Shorted-Load/Short-to-Battery Fault
Detection on All Drain Terminals
D Independent OFF-State Open-Load Fault
Sense on All Drain Terminals
D Transition of Drain Outputs to Low Duty
Cycle Pulsed-Width-Modulation (PWM)
Mode for Over-Current Condition
D Over-Battery-Voltage-Lockout Protection
D Over-Temperature Sense With Serial
Interface Fault Status
D Fault Diagnostics Returned Through Serial
Output Terminal
D Internal Power-On Reset of Registers
D CMOS Compatible Inputs With Hysteresis
description
The TPIC2603 is a monolithic low-side driver which
provides serial interface and diagnostics to control
six on-board power DMOS switches. Each channel
has independent OFF-state open-load sense,
ON-state shorted-load/short-to-battery protection,
over-battery-voltage-lockout protection, and
over-temperature sense with fault status reported
through the serial interface. The device also
provides inductive voltage transient protection for
each drain output. The TPIC2603 drives inductive
and resistive loads such as relays, valves, and
lamps.
NE PACKAGE
(TOP VIEW)
DRAIN5 1
DRAIN4 2
SCLK 3
SDI 4
GND 5
GND 6
SDO 7
CS 8
DRAIN3 9
DRAIN2 ¹⁰
20 V_bat
19 DRAIN0
18 NC
17 NC
16 GND
15 GND
14 NC
13 NC
12 DRAIN1
11 _VCC
DW PACKAGE
(TOP VIEW)
DRAIN5 ₁
DRAIN4 ₂
SCLK ₃
SDI 4
GND 5
GND 6
GND 7
GND 8
SDO 9
CS 10
DRAIN3 11
DRAIN2 12
24 ^V_bat
23 ^DRAIN0
22 ^NC
21 NC
20 GND
19 GND
18 GND
17 GND
16 NC
15 NC
14 DRAIN1
13 V_CC
NC − No internal connection
Serial data input (SDI) is transferred through the serial register when CS is low on low-to-high transitions of the
serial clock (SCLK). Each string of data must consist of 8 or 16 bits of data. A logic high input data bit turns the
respective output channel ON and a logic low data bit turns it OFF. CS must be transited high after all of the serial
data has been clocked into the device. A low-to-high transition of CS transfers the last six bits of serial data to
the output buffer, places the serial data out (SDO) terminal in a high-impedance state, and re-enables the fault
register. Fault data for the device is sent out the SDO terminal. The first bit of the shift register is exclusively
ORed with the fault registers. When a fault exists, the SDI data is inverted as it is transferred out of SDO. Fault
data consists of fault flags for over-temperature (bit 6) and shorted/open-load (bits 0-5) for each of the six output
channels. Fault register bits are set or cleared asynchronously, when CS is high to reflect the current state of
the hardware. The fault must be present when CS is transited from high to low to be captured and reported in
the serial fault data. New faults cannot be captured in the serial register when CS is low.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright  1996, Texas Instruments Incorporated
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
• POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
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