TPD12S520 Datasheet, PDF (1/8 Pages) Texas Instruments – SINGLE-CHIP HDMI RECEIVER PORT PROTECTION AND INTERFACE DEVICE

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TPD12S520
SINGLE-CHIP HDMI RECEIVER PORT PROTECTION AND INTERFACE DEVICE
SLVS640 – OCTOBER 2007
FEATURES
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• Single-Chip ESD Solution for High-Definition
Multmedia Interface (HDMI)
• 0.9 pF Capacitance for High-Speed Transition
Minimized Directional Signaling (TMDS) Lines
• 0.05-pF Matching Capacitance Between
Differential Signal Pair
• Integrated Level Shifting for Control Lines
• ±8-kV Contact ESD Protection on External
Lines
• 38-Pin Thin shrink Small-Outline Package
(TSSOP) Provides Seamless Layout Option
With HDMI Connector
• Backdrive Protection
• Lead-Free Package
APPLICATIONS
• Video Interfaces
• Consumer Electronics
• Displays and Digital Televisions
5V_SUPPLY
LV_SUPPLY
GND
TMDS_D2+
TMDS_GND
TMDS_D2–
TMDS_D1+
TMDS_GND
TMDS_D1–
TMDS_D0+
TMDS_GND
TMDS_D0–
TMDS_CK+
TMDS_GND
TMDS_CK–
CE_REMOTE_IN
DDC_CLK_IN
DDC_DAT_IN
HOTPLUG_DET_IN
DBT PACKAGE
(TOP VIEW)
1
38
2
37
3
36
4
35
5
34
6
33
7
32
8
31
9
30
10
29
11
28
12
27
13
26
14
25
15
24
16
23
17
22
18
21
19
20
NC
ESD_BYP
GND
TMDS_D2+
TMDS_GND
TMDS_D2–
TMDS_D1+
TMDS_GND
TMDS_D1–
TMDS_D0+
TMDS_GND
TMDS_D0–
TMDS_CK+
TMDS_GND
TMDS_CK–
CE_REMOTE_OUT
DDC_CLK_OUT
DDC_DAT_OUT
HOTPLUG_DET_OUT
DESCRIPTION/ORDERING INFORMATION
The TPD12S520 is a single-chip ESD solution for the high-definition multmedia interface (HDMI) receiver port. In
many cases, the core ICs, such as the scalar chipset, may not have robust ESD cells to sustain system-level
ESD strikes. In these cases, the TPD12S520 provides the desired system-level ESD protection, such as the the
IEC61000-4-2 (Level 4) ESD, by absorbing the energy associated with the ESD strike.
While providing the ESD protection, the TPD12S520 adds little or no additional glitch in the high-speed
differential signals (see Figure 3 and Figure 4). The high-speed transition minimized directional signaling (TMDS)
lines add only 0.9 pF capacitance to the lines. In addition, the monolithic integrated circuit technology ensures
that there is excellent matching between the two-signal pair of the differential line. This is a direct advantage over
discrete ESD clamp solutions where variations between two different ESD clamps may significantly degrade the
differential signal quality.
The low-speed control lines offer voltage level-shifting to eliminate the need for an external voltage-level shifter
IC. The control line ESD clamps add 3.5pF capacitance to the control lines.
The 38-pin DBT package offers seamless layout routing option to eliminate the routing glitch for the differential
signal pair. DBT package pitch (0.5 mm) matches the HDMI connector pitch. In addition, the pin mapping follows
the same order as the HDMI connector pin mapping. This HDMI receiver port protection and interface device is
designed specifically for next-generation HDMI receiver-interface protection.
ORDERING INFORMATION
T_A
–40°C to 85°C
PACKAGE ^{(1) (2)}
TSSOP-38
STANDARD FINISH
ORDERABLE
PART NUMBER⁽³⁾
TOP-SIDE
MARKING
TPD12S520DBTR
PREVIEW
LEAD-FREE FINISH
ORDERABLE
PART NUMBER⁽³⁾
TOP-SIDE
MARKING
TPD12S520DBTR
PREVIEW
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(3) Parts are shipped in tape-and-reel form, unless otherwise specified.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCT PREVIEW information concerns products in the
formative or design phase of development. Characteristic data and
other specifications are design goals. Texas Instruments reserves
the right to change or discontinue these products without notice.
Copyright © 2007, Texas Instruments Incorporated