TMS470R1VC338 Datasheet, PDF (1/55 Pages) Texas Instruments – 16/32-BIT RISC ROM MICROCONTROLLERS

TMS470R1VC338, TMS470R1VC348, TMS470R1VC3382, TMS470R1VC3482
16/32-BIT RISC ROM MICROCONTROLLERS
O High-Performance Static CMOS Technology
O TMS470R1x 16/32-Bit RISC Core (ARM7TDMI™)
– 24-MHz System Clock (48-MHz Pipeline
Mode)
– Independent 16/32-Bit Instruction Set
– Open Architecture With Third-Party Support
– Built-In Debug Module
– Utilizes Big-Endian Format
O Integrated Memory
– 256K-Byte Program ROM
– ROM Pipeline Wrapper (RPW)
– 10K-Byte Static RAM (SRAM) (VC3x8)
– 12K-Byte Static RAM (SRAM) (VC3x82)
O Operating Features
– Core Supply Voltage (V_CC): 1.81 V - 2.06 V
– Core Supply Voltage (V_CC): 1.70 V - 2.06 V
When Used from −40 to 85C
– I/O Supply Voltage (V_CCIO): 3.0 V - 3.6 V
– Low-Power Modes: STANDBY and HALT
– Industrial and Automotive Temperature
Ranges
O 470+ System Module
– 32-Bit Address Space Decoding
– Bus Supervision for Memory and
Peripherals
– Analog Watchdog (AWD) Timer
– Real-Time Interrupt (RTI)
– System Integrity and Failure Detection
O Zero-Pin Phase-Locked Loop (ZPLL)-Based
Clock Module With Prescaler
– Multiply-by-4 or -8 Internal ZPLL Option
– ZPLL Bypass Mode
O Six Communication Interfaces:
– Two Serial Peripheral Interfaces (SPIs)
– 255 Programmable Baud Rates
– Two Serial Communications Interfaces
(SCIs)
– 2²⁴ Selectable Baud Rates
– Asynchronous/Isosynchronous Modes
– Standard CAN Controller (SCC)
– 16-Mailbox Capacity
– Fully Compliant With CAN Protocol,
Version 2.0B
SPNS085C – JULY 2003 – REVISED JANUARY 2006
– Class II Serial Interface (C2SIb)
– Two Selectable Data Rates
– Normal Mode 10.4 Kbps and 4X Mode
41.6 Kbps
O High-End Timer (HET)
– 27 Programmable I/O Channels (VC338x):
– 23 High-Resolution Pins
– 4 Standard-Resolution Pins
– 16 Programmable I/O Channels (VC348x):
– 14 High-Resolution Pins
– 2 Standard-Resolution Pins
– High-Resolution Share Feature (XOR)
– High-End Timer RAM
– 64-Instruction Capacity
O 10-Bit Multi-Buffered ADC (MibADC)
12-Channel (VC338x)
16-Channel (VC348x)
– 64-Word FIFO Buffer
– Single- or Continuous-Conversion Modes
– 1.55 μs Minimum Sample and Conversion
Time
– Calibration Mode and Self-Test Features
O Eight External Interrupts
O Flexible Interrupt Handling
O 5 Dedicated General-Purpose I/O (GIO) Pins,
1 Input-Only GIO Pin, and 48 Additional
Peripheral I/Os (VC338x)
O 11 Dedicated GIO Pins,1 Input-Only GIO Pin,
and 38 Additional Peripheral I/Os (VC348x)
O External Clock Prescale (ECP) Module
– Programmable Low-Frequency External
Clock (CLK)
O Compatible ROM Device
O On-Chip Scan-Base Emulation Logic,
IEEE Standard 1149.1^† (JTAG) Test-Access Port
O 100-Pin Plastic Low-Profile Quad Flatpack
(PZ Suffix)
O Development System Support Tools Available
– Code Composer Studio™ Integrated
Development Environment (IDE)
– HET Assembler and Simulator
– Real-Time In-Circuit Emulation
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Code Composer Studio is a trademark of Texas Instruments.
ARM7TDMI is a trademark of Advanced RISC Machines Limited (ARM).
All trademarks are property of their respective owners.
† The test-access port is compatible with the IEEE Standard 1149.1-1990, IEEE Standard Test-Access Port and Boundary Scan Architecture
specification. Boundary scan is not supported on this device.
PRODUCTION DATA information is current as of publication
date. Products conform to specifications per the Texas
Instruments standard warranty. Production processing does
not necessarily include testing of all parameters.
Copyright © 2006, Texas Instruments Incorporated
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