TMS470R1B768_08 Datasheet, PDF (1/49 Pages) Texas Instruments – 16/32-Bit RISC Flash Microcontroller

TMS470R1B768
www.ti.com ......................................................................................................................................................... SPNS108B – AUGUST 2005 – REVISED MAY 2008
16/32-Bit RISC Flash Microcontroller
FEATURES
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•23 High-Performance Static CMOS Technology
• TMS470R1x 16/32-Bit RISC Core (ARM7TDM™)
– 60-MHz (Pipeline Mode)
– Independent 16/32-Bit Instruction Set
– Open Architecture With Third-Party Support
– Built-In Debug Module
– Utilizes Big-Endian Format
• Integrated Memory
– 768K-Byte Program Flash
– 3 Banks With 18 Contiguous Sectors
– Internal State Machine for Programming
and Erase
– 48K-Byte Static RAM (SRAM)
• 15 Dedicated GIO Pins, 1 Input-Only GIO Pin,
and 71 Additional Peripheral I/Os
• Operating Features
– Core Supply Voltage (V_CC): 1.81–2.05 V
– I/O Supply Voltage (V_CCIO): 3.0–3.6 V
– Low-Power Modes: STANDBY and HALT
– Extended Industrial Temperature Range
• 470+ System Module
– 32-Bit Address Space Decoding
– Bus Supervision for Memory and
Peripherals
– Analog Watchdog (AWD) Timer
– Real-Time Interrupt (RTI)
– System Integrity and Failure Detection
– Interrupt Expansion Module (IEM)
• Direct Memory Access (DMA) Controller
– 32 Control Packets and 16 Channels
• Zero-Pin Phase-Locked Loop (ZPLL)-Based
Clock Module With Prescaler
– Multiply-by-4 or -8 Internal ZPLL Option
– ZPLL Bypass Mode
• Ten Communication Interfaces:
– Five Serial Peripheral Interfaces (SPIs)
– 255 Programmable Baud Rates
– Two Serial Communications Interfaces
(SCIs)
– 2²⁴ Selectable Baud Rates
– Asynchronous/Isosynchronous Modes
– Three High-End CAN Controllers (HECCs)
– 32-Mailbox Capacity Each
– Fully Compliant With CAN Protocol,
Version 2.0B
• High-End Timer (HET)
– 32 Programmable I/O Channels:
– 24 High-Resolution Pins
– 8 Standard-Resolution Pins
– High-Resolution Share Feature (XOR)
– High-End Timer RAM
– 128-Instruction Capacity
• 16-Channel 10-Bit Multi-Buffered ADC
(MibADC)
– 256-Word FIFO Buffer
– Single- or Continuous-Conversion Modes
– 1.55-µs Minimum Sample and Conversion
Time
– Calibration Mode and Self-Test Features
• Eight External Interrupts
• Flexible Interrupt Handling
• External Clock Prescale (ECP) Module
– Programmable Low-Frequency External
Clock (CLK)
• On-Chip Scan-Base Emulation Logic, IEEE
Standard 1149.1⁽¹⁾ (JTAG) Test-Access Port
• 144-Pin Plastic Low-Profile Quad Flatpack
(PGE Suffix)
(1) _{The test-access port is compatible with the IEEE Standard}
1149.1-1990, IEEE Standard Test-Access Port and Boundary
Scan Architecture specification. Boundary scan is not
supported on this device.
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
ARM7TDM is a trademark of Advanced RISC Machines Limited (ARM).
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All other trademarks are the property of their respective owners.
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PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005–2008, Texas Instruments Incorporated