TMS320P25 Datasheet, PDF (1/48 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSOR

• Instruction Cycle Time of 100 ns (40 MHz)
• 4K Words of On-Chip Secure Program
EPROM
• 544 Words of On-Chip Data RAM
• 128K Words of Data/Program Space
• 16 Parallel I/O Ports
• 32-Bit ALU/Accumulator
• 16 × 16-Bit Multiplier With a 32-Bit Product
• Block Moves for Data/Program
Management
• Repeat Instructions for Efficient Use of
Program Space
• Serial Port for Direct Codec Interface
• Synchronization Input for Synchronous
Multiprocessor Configurations
• Wait States for Communication to Slow
Off-Chip Memories/Peripherals
• On-Chip Timer for Control Operations
• Single 5-V Supply
• Packaging:
– 68-Lead Plastic J-Leaded Chip Carrier
(FN Suffix)
– 80-Lead Plastic Quad Flatpack
(PH Suffix)
• 68-to-28-Lead Conversion Adapter Socket
for EPROM Programming
description
The TMS320P25 digital signal processor is a
member of the TMS320 family of VLSI digital
signal processors and peripherals. The TMS320
family supports a wide range of digital signal
processing
applications,
such
as
telecommunications,
modems,
image
processing, speech processing, spectrum
analysis, audio processing, digital filtering,
high-speed control, graphics, and other
computation intensive applications.
With a 100-ns instruction cycle time and an
innovative memory configuration, the ’320P25
performs operations necessary for many real-time
digital signal processing algorithms. Since most
instructions require only one cycle, the
TMS320P25 is capable of executing ten million
instructions per second. On-chip programmable
data /program RAM of 544 words of 16 bits,
on-chip program EPROM of 4K words (one-time
programmable memory), direct addressing of up
ADVANCE INFORMATION concerns new products in the sampling or
preproduction phase of development. Characteristic data and other
specifications are subject to change without notice.
TMS320P25
DIGITAL SIGNAL PROCESSOR
SPRS028 – OCTOBER 1994
FN PACKAGE
( TOP VIEW )
VSS
D7
D6
D5
D4
D3
D2
D1
D0
SYNC
INT0
INT1
INT2
VCC
DR
FSR
A0
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
10
60
11
59
12
58
13
57
14
56
15
55
16
54
17
53
18
52
19
51
20
50
21
49
22
48
23
47
24
46
25
45
26
44
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
IACK
MSC
CLKOUT1
CLKOUT2
XF
HOLDA
DX
FSX
X2 CLKIN
X1
BR
STRB
R/W
PS
IS
DS
VSS
PH PACKAGE
( TOP VIEW )
IACK
VCC
VCC
VCC
CLKX
VSS
CLKR
RS
READY
HOLD
BIO
MP / MC
D15
VSS
D14
D13
VCC
D12
D11
D10
D9
D8
VSS
VSS
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65
1
64
2
63
3
62
4
61
5
60
6
59
7
58
8
57
9
56
10
55
11
54
12
53
13
52
14
51
15
50
16
49
17
48
18
47
19
46
20
45
21
44
22
43
23
42
24
41
25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
VSS
VSS
A15
A14
A13
A12
VSS
A11
A10
A9
A8
VCC
VCC
A7
A6
VSS
A5
A4
A3
A2
A1
NC
VSS
A0
Copyright © 1994, Texas Instruments Incorporated
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