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TLV571_06 Datasheet, PDF (1/28 Pages) Texas Instruments – 2.7 V TO 5.5 V, 1-CHANNEL, 8-BIT, PARALLEL ANALOG-TO-DIGITAL CONVERTER
TLV571
2.7 V TO 5.5 V, 1-CHANNEL, 8-BIT,
PARALLEL ANALOG-TO-DIGITAL CONVERTER
SLAS239A – SEPTEMBER 1999 – REVISED FEBRUARY 2000
features
D Fast Throughput Rate: 1.25 MSPS at 5 V,
625 KSPS at 3 V
D Wide Analog Input: 0 V to AVDD
D Differential Nonlinearity Error: < ± 0.5 LSB
D Integral Nonlinearity Error: < ± 0.5 LSB
D Single 2.7-V to 5.5-V Supply Operation
D Low Power: 12 mW at 3 V and 35 mW at 5 V
D Auto Power Down of 1 mA Max
D Software Power Down: 10 µA Max
D Internal OSC
D Hardware Configurable
D DSP and Microcontroller Compatible
Parallel Interface
D Binary/Twos Complement Output
D Hardware Controlled Extended Sampling
D Hardware or Software Start of Conversion
description
applications
D Mass Storage and HDD
D Automotive
D Digital Servos
D Process Control
D General-Purpose DSP
D Image Sensor Processing
CS
WR
RD
CLK
DGND
DVDD
INT/EOC
DGND
DGND
D0
D1
D2
DW OR PW PACKAGE
(TOP VIEW)
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10
15
11
14
12
13
NC
AIN
AVDD
AGND
REFM
REFP
CSTART
A1/D7
A0/D6
D5
D4
D3
The TLV571 is an 8-bit data acquisition system
NC – No internal connection
that combines a high-speed 8-bit ADC and a
parallel interface. The device contains two on-chip control registers allowing control of software conversion start
and power down via the bidirectional parallel port. The control registers can be set to a default mode using a
dummy RD while WR is tied low allowing the registers to be hardware configurable.
The TLV571 operates from a single 2.7-V to 5.5-V power supply. It accepts an analog input range from 0 V to
AVDD and digitizes the input at a maximum 1.25 MSPS throughput rate at 5 V. The power dissipations are only
12 mW with a 3-V supply or 35 mW with a 5-V supply. The device features an auto power-down mode that
automatically powers down to 1 mA 50 ns after conversion is performed. In software power-down mode, the
ADC is further powered down to only 10 µA.
Very high throughput rate, simple parallel interface, and low power consumption make the TLV571 an ideal
choice for high-speed digital signal processing.
TA
– 40°C to 85°C
AVAILABLE OPTIONS
PACKAGE
24 TSSOP
(PW)
24 SOIC
(DW)
TLV571IPW
TLV571IDW
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright © 2000, Texas Instruments Incorporated
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