TLV5591 Datasheet, PDF (1/4 Pages) Texas Instruments – SEMICONDUCTOR SIGNAL PROCESSOR

D FLEXt Paging Protocol Signal Processor
D FLEX Roaming, Fragmentation, and Group
Messaging Support
D FLEX Time-of-Day Stamping Support
D 16 Address Words support any
Combination of Long (2 Word) and Short
(1 Word) Addresses
D 16 Temporary Address Words Support
Group Messaging
D 1600, 3200, and 6400 Bits per Second
Decoding
D Any Phase (1, 2, and 4) Decoding
D Serial Peripheral Interface Security Circuit
Deters Unauthorized Reconfigurations
D 2.0 Volt to 3.3 Volt Operation
D Allows Low Current STOP Mode Operation
of Host Processor
D Uses standard Serial Peripheral Interface
(SPI) in Slave Mode
D 32-bit Packets for Bidirectional
Communications over the Serial Peripheral
Interface
D Universal Receiver Control Supports many
RF Integrated Circuits
D Programmable Low Battery Monitoring
TLV5591
SEMICONDUCTOR SIGNAL PROCESSOR
SLWS024– AUGUST 1995
DW PACKAGE
(TOP VIEW)
NC 1
V_DD 2
RST 3
LO BAT 4
EXTS0 5
EXTS1 6
S0 7
S1 8
S2 9
S3 10
S4 11
S5 12
V_SS 13
NC 14
28 NC
27 V_SS
26 XTAL
25 EXTAL
24 CLKOUT
23 SS
22 SCK
21 SDI
20 SDO
19 I/O RDY
18 ATTN
17 NC
16 V_DD
15 _NC
description
The TLV5591 signal processor is a FLEXt signal processor that takes full advantage of the MotorolaR FLEX
paging protocol. This low-current device operates at synchronous data rates of 1600, 3200, and 6400 bits per
second (bps) using a 76.8 kHz oscillator. This device is readily integrated with standard off-the-shelf electronic
pager components thereby reducing start-up costs associated with pager manufacturing. An industry standard
serial peripheral interface (SPI) transports simultaneous bidirectional 32-bit data packets between the TLV5591
and the host processor.
As a FLEX protocol decoder, the internal TLV5591 receiver control component makes use of 6-stage warm-up,
2-stage locking, and 3-stage warm-down sequences. This control information is passed to the receiver using
six programmable data output lines. Warm-up control allows testing of battery condition, setting output line state,
RF receiver power-on time, and other elements of a pager. The 2-stage locking sequence handles requirements
associated with received FLEX signal baud rate changes. The warm-down control sets the program selectable
time period when signal processing is complete, and the receiver can power-off. Battery condition can be
checked, and the output line state can be changed under warm down control.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
FLEX and Motorola are trademarks of Motorola, Inc.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
Copyright © 1995, Texas Instruments Incorporated
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
• POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443
1