SN75C1406 Datasheet, PDF (1/8 Pages) Texas Instruments – TRIPLE LOW-POWER DRIVERS/RECEIVERS

SN75C1406
TRIPLE LOW-POWER DRIVERS/RECEIVERS
D Meet or Exceed the Requirements of
TIA/EIA-232-F and ITU Recommendation
V.28
D Very Low Power Consumption . . .
5 mW Typ
D Wide Driver Supply Voltage Range . . .
±4.5 V to ±15 V
D Driver Output Slew Rate Limited to
30 V/µs Max
D Receiver Input Hysteresis . . . 1000 mV Typ
D Push-Pull Receiver Outputs
D On-Chip Receiver 1-µs Noise Filter
D Functionally Interchangeable With Motorola
MC145406 and Texas Instruments
TL145406
D Package Options Include Plastic
Small-Outline (D, DW, NS) Packages and
(N) DIPs
SLLS148D – MAY 1990 – REVISED DECEMBER 1999
D, DW, N, OR NS PACKAGE
(TOP VIEW)
V_DD 1
1RA 2
1DY 3
2RA 4
2DY 5
3RA 6
3DY 7
V_SS 8
16 V_CC
15 1RY
14 1DA
13 2RY
12 2DA
11 3RY
10 3DA
9 GND
description
The SN75C1406 is a low-power BiMOS device containing three independent drivers and receivers that are used
to interface data terminal equipment (DTE) with data circuit-terminating equipment (DCE). This device is
designed to conform to TIA/EIA-232-F. The drivers and receivers of the SN75C1406 are similar to those of the
SN75C188 quadruple driver and SN75C189A quadruple receiver, respectively. The drivers have a controlled
output slew rate that is limited to a maximum of 30 V/µs, and the receivers have filters that reject input noise
pulses shorter than 1 µs. Both these features eliminate the need for external components.
The SN75C1406 is designed using low-power techniques in a BiMOS technology. In most applications, the
receivers contained in these devices interface to single inputs of peripheral devices such as ACEs, UARTs, or
microprocessors. By using sampling, such peripheral devices are usually insensitive to the transition times of
the input signals. If this is not the case, or for other uses, it is recommended that the SN75C1406 receiver outputs
be buffered by single Schmitt input gates or single gates of the HCMOS, ALS, or 74F logic families.
The SN75C1406 is characterized for operation from 0°C to 70°C.
logic symbol^†
logic diagram, each driver and receiver
1RA ²
15 _1RY
RA
RY
2RA ⁴
13 _2RY
3RA ⁶
11 _3RY
1DY ³
14 _1DA
2DY ⁵
12 _2DA
DY
DA
3DY ⁷
10 _3DA
† _{This symbol is in accordance with ANSI/IEEE Std 91-1984 and}
IEC Publication 617-12.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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Copyright © 1999, Texas Instruments Incorporated
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