SN75ALS164 Datasheet, PDF (1/13 Pages) Texas Instruments – OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER

SN75ALS164
OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER
D 8-Channel Bidirectional Transceiver
D Designed to Implement Control Bus
Interface
D Designed for Multiple-Controller Systems
D High-Speed Advanced Low-Power Schottky
Circuitry
D Low-Power Dissipation . . . 46 mW Max Per
Channel
D Fast Propagation Times . . . 20 ns Max
D High-Impedance pnp Inputs
D Receiver Hysteresis . . . 650 mV Typ
D Bus-Terminating Resistors Provided on
Driver Outputs
D No Loading of Bus When Device Is
Powered Down (V_CC = 0)
D Power-Up/Power-Down Protection
(Glitch Free)
description
SLLS022C – JUNE 1986 – REVISED MAY 1998
DW PACKAGE
(TOP VIEW)
GPIB
I/O Ports
SC 1
TE 2
REN 3
IFC 4
NDAC 5
NRFD 6
DAV 7
EOI 8
ATN 9
SRQ 10
NC ¹¹
GND ¹²
24 V_CC
23 ATN + EOI
22 REN
21 IFC
20 NDAC
19 NRFD
18 DAV
Terminal
I/O Ports
17 EOI
16 ATN
15 SRQ
14 _NC
13 _DC
NC – No internal connection
NOT RECOMMENDED FOR NEW DESIGNS
The SN75ALS164 eight-channel general-purpose interface bus transceiver is a monolithic, high-speed,
advanced low-power Schottky device designed to meet the requirements of IEEE Standard 488-1978. Each
transceiver is designed to provide the bus-management and data-transfer signals between operating units of
a multiple-controller instrumentation system. When combined with the SN75ALS160 octal bus transceiver, the
SN75ALS164 provides the complete 16-wire interface for the IEEE 488 bus.
The SN75ALS164 features eight driver-receiver pairs connected in a front-to-back configuration to form
input/output (I/O) ports at both the bus and terminal sides. All outputs are disabled (at the high-impedance state)
during V_CC power-up and power-down transitions for glitch-free operation. The direction of data flow through
these driver-receiver pairs is determined by the DC, TE, and SC enable signals. The SN75ALS164 is identical
to the SN75ALS162 with the addition of an OR gate to help simplify board layouts in several popular
applications. The ATN and EOI signals are ORed to provide the ATN + EOI output, which is a standard
totem-pole output.
The driver outputs (GPIB I/O ports) feature active bus-terminating resistor circuits designed to provide a high
impedance to the bus when supply voltage V_CC is 0. The drivers are designed to handle loads up to 48 mA of
sink current. Each receiver features pnp transistor inputs for high input impedance and hysteresis of 400 mV
minimum for increased noise immunity. All receivers have 3-state outputs that present a high impedance to the
terminal when disabled.
The SN75ALS164 is characterized for operation from 0°C to 70°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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