SN74LVT125_06 Datasheet, PDF (1/12 Pages) Texas Instruments – 3.3-V ABT QUADRUPLE BUS BUFFERS WITH 3-STATE OUTPUTS

D Supports Mixed-Mode Signal Operation
(5-V Input and Output Voltages With
3.3-V V_CC )
D Supports Unregulated Battery Operation
Down to 2.7 V
D Typical V_OLP (Output Ground Bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
D I_off Supports Partial-Power-Down Mode
Operation
D Bus-Hold Data Inputs Eliminate the Need
for External Pullup Resistors
D Latch-Up Performance Exceeds 500 mA
Per JEDEC Standard JESD-17
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
SN74LVT125
3.3ĆV ABT QUADRUPLE BUS BUFFER
WITH 3ĆSTATE OUTPUTS
SCBS133F − MAY 1992 − REVISED OCTOBER 2003
D, DB, NS, OR PW PACKAGE
(TOP VIEW)
1OE ¹
1A ²
1Y ³
2OE ⁴
2A ⁵
2Y ⁶
GND ⁷
14 _VCC
13 _4OE
12 _4A
11 _4Y
10 _3OE
9 _3A
8 _3Y
description/ordering information
This bus buffer is designed specifically for low-voltage (3.3-V) V_CC operation, but with the capability to provide
a TTL interface to a 5-V system environment.
The SN74LVT125 features independent line drivers with 3-state outputs. Each output is in the high-impedance
state when the associated output-enable (OE) input is high.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
SOIC − D
Tube
Tape and reel
SN74LVT125D
SN74LVT125DR
LVT125
−40°C to 85°C
SOP − NS
SSOP − DB
Tape and reel
Tape and reel
SN74LVT125NSR
SN74LVT125DBR
LVT125
LX125
TSSOP − PW
Tube
Tape and reel
SN74LVT125PW
SN74LVT125PWR
LX125
† _{Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines}
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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Copyright  2003, Texas Instruments Incorporated
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